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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // A Disassembler object is used to disassemble a block of code instruction by | 5 // A Disassembler object is used to disassemble a block of code instruction by |
6 // instruction. The default implementation of the NameConverter object can be | 6 // instruction. The default implementation of the NameConverter object can be |
7 // overriden to modify register names or to do symbol lookup on addresses. | 7 // overriden to modify register names or to do symbol lookup on addresses. |
8 // | 8 // |
9 // The example below will disassemble a block of code and print it to stdout. | 9 // The example below will disassemble a block of code and print it to stdout. |
10 // | 10 // |
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759 break; | 759 break; |
760 case LZDR: | 760 case LZDR: |
761 Format(instr, "lzdr\t'f5"); | 761 Format(instr, "lzdr\t'f5"); |
762 break; | 762 break; |
763 case MLR: | 763 case MLR: |
764 Format(instr, "mlr\t'r5,'r6"); | 764 Format(instr, "mlr\t'r5,'r6"); |
765 break; | 765 break; |
766 case MLGR: | 766 case MLGR: |
767 Format(instr, "mlgr\t'r5,'r6"); | 767 Format(instr, "mlgr\t'r5,'r6"); |
768 break; | 768 break; |
| 769 case ALCR: |
| 770 Format(instr, "alcr\t'r5,'r6"); |
| 771 break; |
769 case ALGR: | 772 case ALGR: |
770 Format(instr, "algr\t'r5,'r6"); | 773 Format(instr, "algr\t'r5,'r6"); |
771 break; | 774 break; |
772 case ALRK: | 775 case ALRK: |
773 Format(instr, "alrk\t'r5,'r6,'r3"); | 776 Format(instr, "alrk\t'r5,'r6,'r3"); |
774 break; | 777 break; |
775 case ALGRK: | 778 case ALGRK: |
776 Format(instr, "algrk\t'r5,'r6,'r3"); | 779 Format(instr, "algrk\t'r5,'r6,'r3"); |
777 break; | 780 break; |
778 case SLGR: | 781 case SLGR: |
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1387 byte* prev_pc = pc; | 1390 byte* prev_pc = pc; |
1388 pc += d.InstructionDecode(buffer, pc); | 1391 pc += d.InstructionDecode(buffer, pc); |
1389 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc, | 1392 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc, |
1390 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); | 1393 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); |
1391 } | 1394 } |
1392 } | 1395 } |
1393 | 1396 |
1394 } // namespace disasm | 1397 } // namespace disasm |
1395 | 1398 |
1396 #endif // V8_TARGET_ARCH_S390 | 1399 #endif // V8_TARGET_ARCH_S390 |
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