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Issue 1806893002: Reland PPC portion of "Detect cache line size on Linux for PPC hosts." (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright 2006-2013 the V8 project authors. All rights reserved. 1 // Copyright 2006-2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // This module contains the architecture-specific code. This make the rest of 5 // This module contains the architecture-specific code. This make the rest of
6 // the code less dependent on differences between different processor 6 // the code less dependent on differences between different processor
7 // architecture. 7 // architecture.
8 // The classes have the same definition for all architectures. The 8 // The classes have the same definition for all architectures. The
9 // implementation for a particular architecture is put in cpu_<arch>.cc. 9 // implementation for a particular architecture is put in cpu_<arch>.cc.
10 // The build system then uses the implementation for the target architecture. 10 // The build system then uses the implementation for the target architecture.
(...skipping 57 matching lines...) Expand 10 before | Expand all | Expand 10 after
68 PPC_POWER6, 68 PPC_POWER6,
69 PPC_POWER7, 69 PPC_POWER7,
70 PPC_POWER8, 70 PPC_POWER8,
71 PPC_G4, 71 PPC_G4,
72 PPC_G5, 72 PPC_G5,
73 PPC_PA6T 73 PPC_PA6T
74 }; 74 };
75 75
76 // General features 76 // General features
77 bool has_fpu() const { return has_fpu_; } 77 bool has_fpu() const { return has_fpu_; }
78 int icache_line_size() const { return icache_line_size_; }
79 int dcache_line_size() const { return dcache_line_size_; }
80 static const int UNKNOWN_CACHE_LINE_SIZE = 0;
78 81
79 // x86 features 82 // x86 features
80 bool has_cmov() const { return has_cmov_; } 83 bool has_cmov() const { return has_cmov_; }
81 bool has_sahf() const { return has_sahf_; } 84 bool has_sahf() const { return has_sahf_; }
82 bool has_mmx() const { return has_mmx_; } 85 bool has_mmx() const { return has_mmx_; }
83 bool has_sse() const { return has_sse_; } 86 bool has_sse() const { return has_sse_; }
84 bool has_sse2() const { return has_sse2_; } 87 bool has_sse2() const { return has_sse2_; }
85 bool has_sse3() const { return has_sse3_; } 88 bool has_sse3() const { return has_sse3_; }
86 bool has_ssse3() const { return has_ssse3_; } 89 bool has_ssse3() const { return has_ssse3_; }
87 bool has_sse41() const { return has_sse41_; } 90 bool has_sse41() const { return has_sse41_; }
(...skipping 23 matching lines...) Expand all
111 int stepping_; 114 int stepping_;
112 int model_; 115 int model_;
113 int ext_model_; 116 int ext_model_;
114 int family_; 117 int family_;
115 int ext_family_; 118 int ext_family_;
116 int type_; 119 int type_;
117 int implementer_; 120 int implementer_;
118 int architecture_; 121 int architecture_;
119 int variant_; 122 int variant_;
120 int part_; 123 int part_;
124 int icache_line_size_;
125 int dcache_line_size_;
121 bool has_fpu_; 126 bool has_fpu_;
122 bool has_cmov_; 127 bool has_cmov_;
123 bool has_sahf_; 128 bool has_sahf_;
124 bool has_mmx_; 129 bool has_mmx_;
125 bool has_sse_; 130 bool has_sse_;
126 bool has_sse2_; 131 bool has_sse2_;
127 bool has_sse3_; 132 bool has_sse3_;
128 bool has_ssse3_; 133 bool has_ssse3_;
129 bool has_sse41_; 134 bool has_sse41_;
130 bool has_sse42_; 135 bool has_sse42_;
(...skipping 11 matching lines...) Expand all
142 bool has_vfp_; 147 bool has_vfp_;
143 bool has_vfp3_; 148 bool has_vfp3_;
144 bool has_vfp3_d32_; 149 bool has_vfp3_d32_;
145 bool is_fp64_mode_; 150 bool is_fp64_mode_;
146 }; 151 };
147 152
148 } // namespace base 153 } // namespace base
149 } // namespace v8 154 } // namespace v8
150 155
151 #endif // V8_BASE_CPU_H_ 156 #endif // V8_BASE_CPU_H_
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