OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
7 | 7 |
8 #if V8_TARGET_ARCH_PPC | 8 #if V8_TARGET_ARCH_PPC |
9 | 9 |
10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
(...skipping 3435 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3446 int stack_passed_arguments = | 3446 int stack_passed_arguments = |
3447 CalculateStackPassedWords(num_reg_arguments, num_double_arguments); | 3447 CalculateStackPassedWords(num_reg_arguments, num_double_arguments); |
3448 int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments; | 3448 int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments; |
3449 if (ActivationFrameAlignment() > kPointerSize) { | 3449 if (ActivationFrameAlignment() > kPointerSize) { |
3450 LoadP(sp, MemOperand(sp, stack_space * kPointerSize)); | 3450 LoadP(sp, MemOperand(sp, stack_space * kPointerSize)); |
3451 } else { | 3451 } else { |
3452 addi(sp, sp, Operand(stack_space * kPointerSize)); | 3452 addi(sp, sp, Operand(stack_space * kPointerSize)); |
3453 } | 3453 } |
3454 } | 3454 } |
3455 | 3455 |
| 3456 void MacroAssembler::FlushICache(Register address, size_t size, |
| 3457 Register scratch) { |
| 3458 if (CpuFeatures::IsSupported(INSTR_AND_DATA_CACHE_COHERENCY)) { |
| 3459 sync(); |
| 3460 icbi(r0, address); |
| 3461 isync(); |
| 3462 return; |
| 3463 } |
| 3464 |
| 3465 Label done; |
| 3466 |
| 3467 dcbf(r0, address); |
| 3468 sync(); |
| 3469 icbi(r0, address); |
| 3470 isync(); |
| 3471 |
| 3472 // This code handles ranges which cross a single cacheline boundary. |
| 3473 // scratch is last cacheline which intersects range. |
| 3474 const int kCacheLineSizeLog2 = WhichPowerOf2(CpuFeatures::cache_line_size()); |
| 3475 |
| 3476 DCHECK(size > 0 && size <= (size_t)(1 << kCacheLineSizeLog2)); |
| 3477 addi(scratch, address, Operand(size - 1)); |
| 3478 ClearRightImm(scratch, scratch, Operand(kCacheLineSizeLog2)); |
| 3479 cmpl(scratch, address); |
| 3480 ble(&done); |
| 3481 |
| 3482 dcbf(r0, scratch); |
| 3483 sync(); |
| 3484 icbi(r0, scratch); |
| 3485 isync(); |
| 3486 |
| 3487 bind(&done); |
| 3488 } |
3456 | 3489 |
3457 void MacroAssembler::DecodeConstantPoolOffset(Register result, | 3490 void MacroAssembler::DecodeConstantPoolOffset(Register result, |
3458 Register location) { | 3491 Register location) { |
3459 Label overflow_access, done; | 3492 Label overflow_access, done; |
3460 DCHECK(!AreAliased(result, location, r0)); | 3493 DCHECK(!AreAliased(result, location, r0)); |
3461 | 3494 |
3462 // Determine constant pool access type | 3495 // Determine constant pool access type |
3463 // Caller has already placed the instruction word at location in result. | 3496 // Caller has already placed the instruction word at location in result. |
3464 ExtractBitRange(r0, result, 31, 26); | 3497 ExtractBitRange(r0, result, 31, 26); |
3465 cmpi(r0, Operand(ADDIS >> 26)); | 3498 cmpi(r0, Operand(ADDIS >> 26)); |
(...skipping 1164 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
4630 } | 4663 } |
4631 if (mag.shift > 0) srawi(result, result, mag.shift); | 4664 if (mag.shift > 0) srawi(result, result, mag.shift); |
4632 ExtractBit(r0, dividend, 31); | 4665 ExtractBit(r0, dividend, 31); |
4633 add(result, result, r0); | 4666 add(result, result, r0); |
4634 } | 4667 } |
4635 | 4668 |
4636 } // namespace internal | 4669 } // namespace internal |
4637 } // namespace v8 | 4670 } // namespace v8 |
4638 | 4671 |
4639 #endif // V8_TARGET_ARCH_PPC | 4672 #endif // V8_TARGET_ARCH_PPC |
OLD | NEW |