| Index: src/x87/disasm-x87.cc
|
| diff --git a/src/x87/disasm-x87.cc b/src/x87/disasm-x87.cc
|
| index 26e1b9b187a32461023d658cda3d6fc94d5d5b37..ba102e25da49c6e2da32c4ef95f93c59f2dc7ebd 100644
|
| --- a/src/x87/disasm-x87.cc
|
| +++ b/src/x87/disasm-x87.cc
|
| @@ -29,29 +29,18 @@ struct ByteMnemonic {
|
| };
|
|
|
| static const ByteMnemonic two_operands_instr[] = {
|
| - {0x01, "add", OPER_REG_OP_ORDER},
|
| - {0x03, "add", REG_OPER_OP_ORDER},
|
| - {0x09, "or", OPER_REG_OP_ORDER},
|
| - {0x0B, "or", REG_OPER_OP_ORDER},
|
| - {0x1B, "sbb", REG_OPER_OP_ORDER},
|
| - {0x21, "and", OPER_REG_OP_ORDER},
|
| - {0x23, "and", REG_OPER_OP_ORDER},
|
| - {0x29, "sub", OPER_REG_OP_ORDER},
|
| - {0x2A, "subb", REG_OPER_OP_ORDER},
|
| - {0x2B, "sub", REG_OPER_OP_ORDER},
|
| - {0x31, "xor", OPER_REG_OP_ORDER},
|
| - {0x33, "xor", REG_OPER_OP_ORDER},
|
| - {0x38, "cmpb", OPER_REG_OP_ORDER},
|
| - {0x39, "cmp", OPER_REG_OP_ORDER},
|
| - {0x3A, "cmpb", REG_OPER_OP_ORDER},
|
| - {0x3B, "cmp", REG_OPER_OP_ORDER},
|
| - {0x84, "test_b", REG_OPER_OP_ORDER},
|
| - {0x85, "test", REG_OPER_OP_ORDER},
|
| - {0x87, "xchg", REG_OPER_OP_ORDER},
|
| - {0x8A, "mov_b", REG_OPER_OP_ORDER},
|
| - {0x8B, "mov", REG_OPER_OP_ORDER},
|
| - {0x8D, "lea", REG_OPER_OP_ORDER},
|
| - {-1, "", UNSET_OP_ORDER}};
|
| + {0x01, "add", OPER_REG_OP_ORDER}, {0x03, "add", REG_OPER_OP_ORDER},
|
| + {0x09, "or", OPER_REG_OP_ORDER}, {0x0B, "or", REG_OPER_OP_ORDER},
|
| + {0x13, "adc", REG_OPER_OP_ORDER}, {0x1B, "sbb", REG_OPER_OP_ORDER},
|
| + {0x21, "and", OPER_REG_OP_ORDER}, {0x23, "and", REG_OPER_OP_ORDER},
|
| + {0x29, "sub", OPER_REG_OP_ORDER}, {0x2A, "subb", REG_OPER_OP_ORDER},
|
| + {0x2B, "sub", REG_OPER_OP_ORDER}, {0x31, "xor", OPER_REG_OP_ORDER},
|
| + {0x33, "xor", REG_OPER_OP_ORDER}, {0x38, "cmpb", OPER_REG_OP_ORDER},
|
| + {0x39, "cmp", OPER_REG_OP_ORDER}, {0x3A, "cmpb", REG_OPER_OP_ORDER},
|
| + {0x3B, "cmp", REG_OPER_OP_ORDER}, {0x84, "test_b", REG_OPER_OP_ORDER},
|
| + {0x85, "test", REG_OPER_OP_ORDER}, {0x87, "xchg", REG_OPER_OP_ORDER},
|
| + {0x8A, "mov_b", REG_OPER_OP_ORDER}, {0x8B, "mov", REG_OPER_OP_ORDER},
|
| + {0x8D, "lea", REG_OPER_OP_ORDER}, {-1, "", UNSET_OP_ORDER}};
|
|
|
| static const ByteMnemonic zero_operands_instr[] = {
|
| {0xC3, "ret", UNSET_OP_ORDER},
|
|
|