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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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58 ExternalReference ExternalReference::cpu_features() { | 58 ExternalReference ExternalReference::cpu_features() { |
59 ASSERT(CpuFeatures::initialized_); | 59 ASSERT(CpuFeatures::initialized_); |
60 return ExternalReference(&CpuFeatures::supported_); | 60 return ExternalReference(&CpuFeatures::supported_); |
61 } | 61 } |
62 | 62 |
63 | 63 |
64 int IntelDoubleRegister::NumAllocatableRegisters() { | 64 int IntelDoubleRegister::NumAllocatableRegisters() { |
65 if (CpuFeatures::IsSupported(SSE2)) { | 65 if (CpuFeatures::IsSupported(SSE2)) { |
66 return XMMRegister::kNumAllocatableRegisters; | 66 return XMMRegister::kNumAllocatableRegisters; |
67 } else { | 67 } else { |
68 return X87TopOfStackRegister::kNumAllocatableRegisters; | 68 return X87Register::kNumAllocatableRegisters; |
69 } | 69 } |
70 } | 70 } |
71 | 71 |
72 | 72 |
73 int IntelDoubleRegister::NumRegisters() { | 73 int IntelDoubleRegister::NumRegisters() { |
74 if (CpuFeatures::IsSupported(SSE2)) { | 74 if (CpuFeatures::IsSupported(SSE2)) { |
75 return XMMRegister::kNumRegisters; | 75 return XMMRegister::kNumRegisters; |
76 } else { | 76 } else { |
77 return X87TopOfStackRegister::kNumRegisters; | 77 return X87Register::kNumRegisters; |
78 } | 78 } |
79 } | 79 } |
80 | 80 |
81 | 81 |
82 const char* IntelDoubleRegister::AllocationIndexToString(int index) { | 82 const char* IntelDoubleRegister::AllocationIndexToString(int index) { |
83 if (CpuFeatures::IsSupported(SSE2)) { | 83 if (CpuFeatures::IsSupported(SSE2)) { |
84 return XMMRegister::AllocationIndexToString(index); | 84 return XMMRegister::AllocationIndexToString(index); |
85 } else { | 85 } else { |
86 return X87TopOfStackRegister::AllocationIndexToString(index); | 86 return X87Register::AllocationIndexToString(index); |
87 } | 87 } |
88 } | 88 } |
89 | 89 |
90 | 90 |
91 // The Probe method needs executable memory, so it uses Heap::CreateCode. | 91 // The Probe method needs executable memory, so it uses Heap::CreateCode. |
92 // Allocation failure is silent and leads to safe default. | 92 // Allocation failure is silent and leads to safe default. |
93 void CpuFeatures::Probe() { | 93 void CpuFeatures::Probe() { |
94 ASSERT(!initialized_); | 94 ASSERT(!initialized_); |
95 ASSERT(supported_ == 0); | 95 ASSERT(supported_ == 0); |
96 #ifdef DEBUG | 96 #ifdef DEBUG |
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1777 } | 1777 } |
1778 | 1778 |
1779 | 1779 |
1780 void Assembler::fisub_s(const Operand& adr) { | 1780 void Assembler::fisub_s(const Operand& adr) { |
1781 EnsureSpace ensure_space(this); | 1781 EnsureSpace ensure_space(this); |
1782 EMIT(0xDA); | 1782 EMIT(0xDA); |
1783 emit_operand(esp, adr); | 1783 emit_operand(esp, adr); |
1784 } | 1784 } |
1785 | 1785 |
1786 | 1786 |
| 1787 void Assembler::fmul_i(int i) { |
| 1788 EnsureSpace ensure_space(this); |
| 1789 emit_farith(0xD8, 0xC8, i); |
| 1790 } |
| 1791 |
| 1792 |
1787 void Assembler::fmul(int i) { | 1793 void Assembler::fmul(int i) { |
1788 EnsureSpace ensure_space(this); | 1794 EnsureSpace ensure_space(this); |
1789 emit_farith(0xDC, 0xC8, i); | 1795 emit_farith(0xDC, 0xC8, i); |
1790 } | 1796 } |
1791 | 1797 |
1792 | 1798 |
1793 void Assembler::fdiv(int i) { | 1799 void Assembler::fdiv(int i) { |
1794 EnsureSpace ensure_space(this); | 1800 EnsureSpace ensure_space(this); |
1795 emit_farith(0xDC, 0xF8, i); | 1801 emit_farith(0xDC, 0xF8, i); |
1796 } | 1802 } |
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2698 fprintf(coverage_log, "%s\n", file_line); | 2704 fprintf(coverage_log, "%s\n", file_line); |
2699 fflush(coverage_log); | 2705 fflush(coverage_log); |
2700 } | 2706 } |
2701 } | 2707 } |
2702 | 2708 |
2703 #endif | 2709 #endif |
2704 | 2710 |
2705 } } // namespace v8::internal | 2711 } } // namespace v8::internal |
2706 | 2712 |
2707 #endif // V8_TARGET_ARCH_IA32 | 2713 #endif // V8_TARGET_ARCH_IA32 |
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