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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | 28 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 29 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
30 | 30 |
31 // The original source code covered by the above license above has been | 31 // The original source code covered by the above license above has been |
32 // modified significantly by Google Inc. | 32 // modified significantly by Google Inc. |
33 // Copyright 2012 the V8 project authors. All rights reserved. | 33 // Copyright 2012 the V8 project authors. All rights reserved. |
34 | 34 |
35 | 35 |
36 #include "v8.h" | 36 #include "v8.h" |
37 | 37 |
38 #if defined(V8_TARGET_ARCH_MIPS) | 38 #if V8_TARGET_ARCH_MIPS |
39 | 39 |
40 #include "mips/assembler-mips-inl.h" | 40 #include "mips/assembler-mips-inl.h" |
41 #include "serialize.h" | 41 #include "serialize.h" |
42 | 42 |
43 namespace v8 { | 43 namespace v8 { |
44 namespace internal { | 44 namespace internal { |
45 | 45 |
46 #ifdef DEBUG | 46 #ifdef DEBUG |
47 bool CpuFeatures::initialized_ = false; | 47 bool CpuFeatures::initialized_ = false; |
48 #endif | 48 #endif |
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1468 (code > kMaxStopCode || | 1468 (code > kMaxStopCode || |
1469 code <= kMaxWatchpointCode))); | 1469 code <= kMaxWatchpointCode))); |
1470 Instr break_instr = SPECIAL | BREAK | (code << 6); | 1470 Instr break_instr = SPECIAL | BREAK | (code << 6); |
1471 emit(break_instr); | 1471 emit(break_instr); |
1472 } | 1472 } |
1473 | 1473 |
1474 | 1474 |
1475 void Assembler::stop(const char* msg, uint32_t code) { | 1475 void Assembler::stop(const char* msg, uint32_t code) { |
1476 ASSERT(code > kMaxWatchpointCode); | 1476 ASSERT(code > kMaxWatchpointCode); |
1477 ASSERT(code <= kMaxStopCode); | 1477 ASSERT(code <= kMaxStopCode); |
1478 #if defined(V8_HOST_ARCH_MIPS) | 1478 #if V8_HOST_ARCH_MIPS |
1479 break_(0x54321); | 1479 break_(0x54321); |
1480 #else // V8_HOST_ARCH_MIPS | 1480 #else // V8_HOST_ARCH_MIPS |
1481 BlockTrampolinePoolFor(2); | 1481 BlockTrampolinePoolFor(2); |
1482 // The Simulator will handle the stop instruction and get the message address. | 1482 // The Simulator will handle the stop instruction and get the message address. |
1483 // On MIPS stop() is just a special kind of break_(). | 1483 // On MIPS stop() is just a special kind of break_(). |
1484 break_(code, true); | 1484 break_(code, true); |
1485 emit(reinterpret_cast<Instr>(msg)); | 1485 emit(reinterpret_cast<Instr>(msg)); |
1486 #endif | 1486 #endif |
1487 } | 1487 } |
1488 | 1488 |
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2286 } | 2286 } |
2287 | 2287 |
2288 if (patched) { | 2288 if (patched) { |
2289 CPU::FlushICache(pc+2, sizeof(Address)); | 2289 CPU::FlushICache(pc+2, sizeof(Address)); |
2290 } | 2290 } |
2291 } | 2291 } |
2292 | 2292 |
2293 } } // namespace v8::internal | 2293 } } // namespace v8::internal |
2294 | 2294 |
2295 #endif // V8_TARGET_ARCH_MIPS | 2295 #endif // V8_TARGET_ARCH_MIPS |
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