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Issue 1803403002: Subzero. Flags refactoring. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments. Created 4 years, 9 months ago
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1 //===- subzero/src/IceClFlags.def - Cl Flags for translation ----*- C++ -*-===//
2 //
3 // The Subzero Code Generator
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief Declares the command line flags used by Subzero.
12 ///
13 //===----------------------------------------------------------------------===//
14
15 #ifndef SUBZERO_SRC_ICECLFLAGS_DEF
16 #define SUBZERO_SRC_ICECLFLAGS_DEF
17
18 namespace Ice {
19 // cl_detail defines tags (i.e., structs) for specifying the type of a flag
20 // (either single-, or multi-value), and whether or not the flag is available in
21 // non-LLVM_CL build.
22 namespace cl_detail {
23
24 // Single-value flag, available in a non-LLVM_CL build.
25 struct release_opt_flag {};
26 // Single-value flag, not available in a non-LLVM_CL build.
27 struct dev_opt_flag {};
28 // Multi-value flag, not available in a non-LLVM_CL build.
29 struct dev_list_flag {};
30
31 } // end of namespace detail
32
33 #define COMMAND_LINE_FLAGS \
34 /* Name, Type, ClType, <<flag declaration ctor arguments>> */ \
35 X(IRFilename, std::string, release_opt_flag, cl::Positional, \
36 cl::desc("IR File"), cl::init("-")) \
37 \
38 X(NumTranslationThreads, uint32_t, release_opt_flag, "threads", \
39 cl::desc("Number of translation threads (0 for purely sequential)"), \
40 cl::init(2)) \
41 \
42 X(OptLevel, Ice::OptLevel, release_opt_flag, cl::desc("Optimization level"), \
43 cl::init(Ice::Opt_m1), cl::value_desc("level"), \
44 cl::values(clEnumValN(Ice::Opt_m1, "Om1", "-1"), \
45 clEnumValN(Ice::Opt_m1, "O-1", "-1"), \
46 clEnumValN(Ice::Opt_0, "O0", "0"), \
47 clEnumValN(Ice::Opt_1, "O1", "1"), \
48 clEnumValN(Ice::Opt_2, "O2", "2"), clEnumValEnd)) \
49 \
50 X(OutputFilename, std::string, release_opt_flag, "o", \
51 cl::desc("Override output filename"), cl::init("-"), \
52 cl::value_desc("filename")) \
53 \
54 X(TargetArch, Ice::TargetArch, release_opt_flag, "target", \
55 cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), \
56 cl::values( \
57 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), \
58 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), \
59 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), \
60 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), \
61 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), \
62 clEnumValN(Ice::Target_X8664, "x86_64", "x86-64 (same as x8664)"), \
63 clEnumValN(Ice::Target_ARM32, "arm", "arm32"), \
64 clEnumValN(Ice::Target_ARM32, "arm32", "arm32 (same as arm)"), \
65 clEnumValN(Ice::Target_ARM64, "arm64", "arm64"), \
66 clEnumValN(Ice::Target_MIPS32, "mips", "mips32"), \
67 clEnumValN(Ice::Target_MIPS32, "mips32", "mips32 (same as mips)"), \
68 clEnumValEnd)) \
69 \
70 /* The following are development flags, and ideally should not appear in a \
71 * release build. */ \
72 \
73 X(AllowErrorRecovery, bool, dev_opt_flag, \
74 "allow-pnacl-reader-error-recovery", \
75 cl::desc("Allow error recovery when reading PNaCl bitcode."), \
76 cl::init(false)) \
77 \
78 X(AllowExternDefinedSymbols, bool, dev_opt_flag, \
79 "allow-externally-defined-symbols", \
80 cl::desc( \
81 "Allow global symbols to be externally defined (other than _start " \
82 "and __pnacl_pso_root)."), \
83 cl::init(false)) \
84 \
85 X(AllowIacaMarks, bool, dev_opt_flag, "allow-iaca-marks", \
86 cl::desc("Allow IACA (Intel Architecture Code Analyzer) marks to be " \
87 "inserted. These binaries are not executable."), \
88 cl::init(false)) \
89 \
90 X(AllowUninitializedGlobals, bool, dev_opt_flag, \
91 "allow-uninitialized-globals", \
92 cl::desc("Allow global variables to be uninitialized")) \
93 \
94 X(AlwaysExitSuccess, bool, dev_opt_flag, "exit-success", \
95 cl::desc("Exit with success status, even if errors found"), \
96 cl::init(false)) \
97 \
98 X(BitcodeAsText, bool, dev_opt_flag, "bitcode-as-text", \
99 cl::desc("Accept textual form of PNaCl bitcode " \
100 "records (i.e. not .ll assembly)"), \
101 cl::init(false)) \
102 \
103 X(BuildOnRead, bool, dev_opt_flag, "build-on-read", \
104 cl::desc("Build ICE instructions when reading bitcode"), cl::init(true)) \
105 \
106 X(DataSections, bool, dev_opt_flag, "fdata-sections", \
107 cl::desc("Emit (global) data into separate sections")) \
108 \
109 X(DecorateAsm, bool, dev_opt_flag, "asm-verbose", \
110 cl::desc("Decorate textual asm output with register liveness info")) \
111 \
112 X(DefaultFunctionPrefix, std::string, dev_opt_flag, \
113 "default-function-prefix", \
114 cl::desc("Define default function prefix for naming " \
115 "unnamed functions"), \
116 cl::init(Ice::BuildDefs::dump() ? "Function" : "F")) \
117 \
118 X(DefaultGlobalPrefix, std::string, dev_opt_flag, "default-global-prefix", \
119 cl::desc("Define default global prefix for naming " \
120 "unnamed globals"), \
121 cl::init(Ice::BuildDefs::dump() ? "Global" : "G")) \
122 \
123 X(DisableHybridAssembly, bool, dev_opt_flag, "no-hybrid-asm", \
124 cl::desc("Disable hybrid assembly when -filetype=iasm"), cl::init(false)) \
125 \
126 X(DisableInternal, bool, dev_opt_flag, "externalize", \
127 cl::desc("Externalize all symbols")) \
128 \
129 X(DisableTranslation, bool, dev_opt_flag, "notranslate", \
130 cl::desc("Disable Subzero translation")) \
131 \
132 X(DumpStats, bool, dev_opt_flag, "szstats", \
133 cl::desc("Print statistics after translating each function")) \
134 \
135 X(EnableBlockProfile, bool, dev_opt_flag, "enable-block-profile", \
136 cl::desc("Instrument basic blocks, and output profiling " \
137 "information to stdout at the end of program execution."), \
138 cl::init(false)) \
139 \
140 X(EnablePhiEdgeSplit, bool, dev_opt_flag, "phi-edge-split", \
141 cl::desc("Enable edge splitting for Phi lowering"), cl::init(true)) \
142 \
143 X(ExcludedRegisters, std::string, dev_list_flag, "reg-exclude", \
144 cl::CommaSeparated, cl::desc("Don't use specified registers")) \
145 \
146 X(ForceMemIntrinOpt, bool, dev_opt_flag, "fmem-intrin-opt", \
147 cl::desc("Force optimization of memory intrinsics.")) \
148 \
149 X(FunctionSections, bool, dev_opt_flag, "ffunction-sections", \
150 cl::desc("Emit functions into separate sections")) \
151 \
152 X(GenerateBuildAtts, bool, release_opt_flag, "build-atts", \
153 cl::desc("Generate list of build attributes associated with " \
154 "this executable."), \
155 cl::init(false)) \
156 \
157 X(InputFileFormat, llvm::NaClFileFormat, dev_opt_flag, "bitcode-format", \
158 cl::desc("Define format of input file:"), \
159 cl::values(clEnumValN(llvm::LLVMFormat, "llvm", "LLVM file (default)"), \
160 clEnumValN(llvm::PNaClFormat, "pnacl", "PNaCl bitcode file"), \
161 clEnumValEnd), \
162 cl::init(llvm::LLVMFormat)) \
163 \
164 X(KeepDeletedInsts, bool, dev_opt_flag, "keep-deleted-insts", \
165 cl::desc("Retain deleted instructions in the Cfg"), \
166 cl::init(Ice::BuildDefs::dump())) \
167 \
168 X(LLVMVerboseErrors, bool, dev_opt_flag, "verbose-llvm-parse-errors", \
169 cl::desc("Print out more descriptive PNaCl bitcode parse errors when " \
170 "building LLVM IR first"), \
171 cl::init(false)) \
172 \
173 X(LogFilename, std::string, dev_opt_flag, "log", \
174 cl::desc("Set log filename"), cl::init("-"), cl::value_desc("filename")) \
175 \
176 X(MaxNopsPerInstruction, int, dev_opt_flag, "max-nops-per-instruction", \
177 cl::desc("Max number of nops to insert per instruction"), cl::init(1)) \
178 \
179 X(MockBoundsCheck, bool, dev_opt_flag, "mock-bounds-check", \
180 cl::desc("Mock bounds checking on loads/stores")) \
181 \
182 X(NopProbabilityAsPercentage, int, dev_opt_flag, "nop-insertion-percentage", \
183 cl::desc("Nop insertion probability as percentage"), cl::init(10)) \
184 \
185 X(OutFileType, Ice::FileType, dev_opt_flag, "filetype", \
186 cl::desc("Output file type"), cl::init(Ice::FT_Iasm), \
187 cl::values( \
188 clEnumValN(Ice::FT_Elf, "obj", "Native ELF object ('.o') file"), \
189 clEnumValN(Ice::FT_Asm, "asm", "Assembly ('.s') file"), \
190 clEnumValN(Ice::FT_Iasm, "iasm", \
191 "Low-level integrated assembly ('.s') file"), \
192 clEnumValEnd)) \
193 \
194 X(RandomizeAndPoolImmediatesOption, Ice::RandomizeAndPoolImmediatesEnum, \
195 dev_opt_flag, "randomize-pool-immediates", \
196 cl::desc("Randomize or pooling the representation of immediates"), \
197 cl::init(Ice::RPI_None), \
198 cl::values(clEnumValN(Ice::RPI_None, "none", \
199 "Do not randomize or pooling immediates (default)"), \
200 clEnumValN(Ice::RPI_Randomize, "randomize", \
201 "Turn on immediate constants blinding"), \
202 clEnumValN(Ice::RPI_Pool, "pool", \
203 "Turn on immediate constants pooling"), \
204 clEnumValEnd)) \
205 \
206 X(RandomizeAndPoolImmediatesThreshold, uint32_t, dev_opt_flag, \
207 "randomize-pool-threshold", \
208 cl::desc("The threshold for immediates randomization and pooling"), \
209 cl::init(0xffff)) \
210 \
211 X(RandomizeRegisterAllocation, bool, dev_opt_flag, "randomize-regalloc", \
212 cl::desc("Randomize register allocation"), cl::init(false)) \
213 \
214 X(RandomSeed, unsigned long long, dev_opt_flag, "sz-seed", \
215 cl::desc("Seed the random number generator"), cl::init(1)) \
216 \
217 X(RegAllocReserve, bool, dev_opt_flag, "reg-reserve", \
218 cl::desc("Let register allocation use reserve registers"), \
219 cl::init(false)) \
220 \
221 X(ReorderBasicBlocks, bool, dev_opt_flag, "reorder-basic-blocks", \
222 cl::desc("Shuffle the layout of basic blocks in each function"), \
223 cl::init(false)) \
224 \
225 X(ReorderFunctions, bool, dev_opt_flag, "reorder-functions", \
226 cl::desc("Randomize function ordering"), cl::init(false)) \
227 \
228 X(ReorderFunctionsWindowSize, uint32_t, dev_opt_flag, \
229 "reorder-functions-window-size", \
230 cl::desc( \
231 "The shuffling window size for function reordering. 1 or 0 means " \
232 "no effective shuffling."), \
233 cl::init(8)) \
234 \
235 X(ReorderGlobalVariables, bool, dev_opt_flag, "reorder-global-variables", \
236 cl::desc("Randomize global data ordering"), cl::init(false)) \
237 \
238 X(ReorderPooledConstants, bool, dev_opt_flag, "reorder-pooled-constants", \
239 cl::desc("Randomize constant pool entry ordering"), cl::init(false)) \
240 \
241 X(RepeatRegAlloc, bool, dev_opt_flag, "regalloc-repeat", \
242 cl::desc("Repeat register allocation until convergence"), cl::init(true)) \
243 \
244 X(ShouldDoNopInsertion, bool, dev_opt_flag, "nop-insertion", \
245 cl::desc("Randomly insert NOPs"), cl::init(false)) \
246 \
247 X(SkipUnimplemented, bool, dev_opt_flag, "skip-unimplemented", \
248 cl::desc("Skip through unimplemented lowering code instead of aborting."), \
249 cl::init(false)) \
250 \
251 X(SubzeroTimingEnabled, bool, dev_opt_flag, "timing", \
252 cl::desc("Enable breakdown timing of Subzero translation")) \
253 \
254 X(TargetInstructionSet, Ice::TargetInstructionSet, dev_opt_flag, "mattr", \
255 cl::desc("Target architecture attributes"), \
256 cl::init(Ice::BaseInstructionSet), \
257 cl::values( \
258 clEnumValN(Ice::BaseInstructionSet, "base", \
259 "Target chooses baseline instruction set (default)"), \
260 clEnumValN(Ice::X86InstructionSet_SSE2, "sse2", \
261 "Enable X86 SSE2 instructions"), \
262 clEnumValN(Ice::X86InstructionSet_SSE4_1, "sse4.1", \
263 "Enable X86 SSE 4.1 instructions"), \
264 clEnumValN(Ice::ARM32InstructionSet_Neon, "neon", \
265 "Enable ARM Neon instructions"), \
266 clEnumValN(Ice::ARM32InstructionSet_HWDivArm, "hwdiv-arm", \
267 "Enable ARM integer divide instructions in ARM mode"), \
268 clEnumValEnd)) \
269 \
270 X(TestPrefix, std::string, dev_opt_flag, "prefix", \
271 cl::desc("Prepend a prefix to symbol names for testing"), cl::init(""), \
272 cl::value_desc("prefix")) \
273 \
274 X(TestStackExtra, uint32_t, dev_opt_flag, "test-stack-extra", \
275 cl::desc("Extra amount of stack to add to the " \
276 "frame in bytes (for testing)."), \
277 cl::init(0)) \
278 \
279 X(TimeEachFunction, bool, dev_opt_flag, "timing-funcs", \
280 cl::desc("Print total translation time for each function")) \
281 \
282 X(TimingFocusOn, std::string, dev_opt_flag, "timing-focus", \
283 cl::desc("Break down timing for a specific function (use '*' for all)"), \
284 cl::init("")) \
285 \
286 X(TranslateOnly, std::string, dev_opt_flag, "translate-only", \
287 cl::desc("Translate only the given function"), cl::init("")) \
288 \
289 X(UseNonsfi, bool, dev_opt_flag, "nonsfi", cl::desc("Enable Non-SFI mode")) \
290 \
291 X(UseRestrictedRegisters, std::string, dev_list_flag, "reg-use", \
292 cl::CommaSeparated, \
293 cl::desc("Only use specified registers for corresponding register " \
294 "classes")) \
295 \
296 X(UseSandboxing, bool, dev_opt_flag, "sandbox", cl::desc("Use sandboxing")) \
297 \
298 X(Verbose, Ice::VerboseItem, dev_list_flag, "verbose", cl::CommaSeparated, \
299 cl::desc("Verbose options (can be comma-separated):"), \
300 cl::values( \
301 clEnumValN(Ice::IceV_Instructions, "inst", \
302 "Print basic instructions"), \
303 clEnumValN(Ice::IceV_Deleted, "del", "Include deleted instructions"), \
304 clEnumValN(Ice::IceV_InstNumbers, "instnum", \
305 "Print instruction numbers"), \
306 clEnumValN(Ice::IceV_Preds, "pred", "Show predecessors"), \
307 clEnumValN(Ice::IceV_Succs, "succ", "Show successors"), \
308 clEnumValN(Ice::IceV_Liveness, "live", "Liveness information"), \
309 clEnumValN(Ice::IceV_RegOrigins, "orig", "Physical register origins"), \
310 clEnumValN(Ice::IceV_LinearScan, "regalloc", "Linear scan details"), \
311 clEnumValN(Ice::IceV_Frame, "frame", "Stack frame layout details"), \
312 clEnumValN(Ice::IceV_AddrOpt, "addropt", "Address mode optimization"), \
313 clEnumValN(Ice::IceV_Random, "random", "Randomization details"), \
314 clEnumValN(Ice::IceV_Folding, "fold", "Instruction folding details"), \
315 clEnumValN(Ice::IceV_RMW, "rmw", "ReadModifyWrite optimization"), \
316 clEnumValN(Ice::IceV_Loop, "loop", "Loop nest depth analysis"), \
317 clEnumValN(Ice::IceV_Mem, "mem", "Memory usage details"), \
318 clEnumValN(Ice::IceV_Status, "status", \
319 "Print the name of the function being translated"), \
320 clEnumValN(Ice::IceV_AvailableRegs, "registers", \
321 "Show available registers for register allocation"), \
322 clEnumValN(Ice::IceV_GlobalInit, "global_init", \
323 "Global initializers"), \
324 clEnumValN(Ice::IceV_ConstPoolStats, "cpool", \
325 "Constant pool counters"), \
326 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), \
327 clEnumValN(Ice::IceV_Most, "most", \
328 "Use all verbose options except 'regalloc,global_init'"), \
329 clEnumValN(Ice::IceV_None, "none", "No verbosity"), clEnumValEnd)) \
330 \
331 X(VerboseFocusOn, std::string, dev_opt_flag, "verbose-focus", \
332 cl::desc("Override with -verbose=none except for the specified function"), \
333 cl::init(""))
334 //#define X(Name, Type, ClType, ...)
335
336 } // end of namespace Ice
337
338 #endif // SUBZERO_SRC_ICECLFLAGS_DEF
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