PPC: [wasm] Int64Lowering of Int64Add.

src/compiler/ppc/instruction-selector-ppc.cc

Index: src/compiler/ppc/instruction-selector-ppc.cc
diff --git a/src/compiler/ppc/instruction-selector-ppc.cc b/src/compiler/ppc/instruction-selector-ppc.cc
index fa28bec9fc18dcaffebcdcbac5d0853f93943abb..4d35516d51416cbe19368010eb966cf958835d06 100644
--- a/src/compiler/ppc/instruction-selector-ppc.cc
+++ b/src/compiler/ppc/instruction-selector-ppc.cc
@@ -785,6 +785,22 @@ void InstructionSelector::VisitWord32Sar(Node* node) {
 }
 
 #if !V8_TARGET_ARCH_PPC64
+void InstructionSelector::VisitInt32PairAdd(Node* node) {
+  PPCOperandGenerator g(this);
+
+  // We use UseUniqueRegister here to avoid register sharing with the output
+  // registers.
+  InstructionOperand inputs[] = {
+      g.UseRegister(node->InputAt(0)), g.UseUniqueRegister(node->InputAt(1)),
+      g.UseRegister(node->InputAt(2)), g.UseUniqueRegister(node->InputAt(3))};
+
+  InstructionOperand outputs[] = {
+      g.DefineAsRegister(node),
+      g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
+
+  Emit(kPPC_AddPair, 2, outputs, 4, inputs);
+}
+
 void VisitPairShift(InstructionSelector* selector, ArchOpcode opcode,
                     Node* node) {
   PPCOperandGenerator g(selector);
@@ -898,10 +914,6 @@ void InstructionSelector::VisitInt64Add(Node* node) {
 }
 #endif
 
-#if !V8_TARGET_ARCH_PPC64
-void InstructionSelector::VisitInt32PairAdd(Node* node) { UNIMPLEMENTED(); }
-#endif
-
 void InstructionSelector::VisitInt32Sub(Node* node) {
   PPCOperandGenerator g(this);
   Int32BinopMatcher m(node);