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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 811 void subfic(Register dst, Register src, const Operand& imm); | 811 void subfic(Register dst, Register src, const Operand& imm); |
| 812 | 812 |
| 813 void subfc(Register dst, Register src1, Register src2, OEBit s = LeaveOE, | 813 void subfc(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
| 814 RCBit r = LeaveRC); | 814 RCBit r = LeaveRC); |
| 815 | 815 |
| 816 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE, | 816 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
| 817 RCBit r = LeaveRC); | 817 RCBit r = LeaveRC); |
| 818 | 818 |
| 819 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 819 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
| 820 RCBit r = LeaveRC); | 820 RCBit r = LeaveRC); |
| 821 | 821 void adde(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
| 822 void addze(Register dst, Register src1, OEBit o, RCBit r); | 822 RCBit r = LeaveRC); |
| 823 void addze(Register dst, Register src1, OEBit o = LeaveOE, RCBit r = LeaveRC); |
| 823 | 824 |
| 824 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 825 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
| 825 RCBit r = LeaveRC); | 826 RCBit r = LeaveRC); |
| 826 | 827 |
| 827 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC); | 828 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC); |
| 828 void mulhwu(Register dst, Register src1, Register src2, RCBit r = LeaveRC); | 829 void mulhwu(Register dst, Register src1, Register src2, RCBit r = LeaveRC); |
| 829 | 830 |
| 830 void divw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 831 void divw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
| 831 RCBit r = LeaveRC); | 832 RCBit r = LeaveRC); |
| 832 void divwu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 833 void divwu(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
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| 1472 | 1473 |
| 1473 | 1474 |
| 1474 class EnsureSpace BASE_EMBEDDED { | 1475 class EnsureSpace BASE_EMBEDDED { |
| 1475 public: | 1476 public: |
| 1476 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } | 1477 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } |
| 1477 }; | 1478 }; |
| 1478 } // namespace internal | 1479 } // namespace internal |
| 1479 } // namespace v8 | 1480 } // namespace v8 |
| 1480 | 1481 |
| 1481 #endif // V8_PPC_ASSEMBLER_PPC_H_ | 1482 #endif // V8_PPC_ASSEMBLER_PPC_H_ |
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