Add X32 port into V8

src/x64/macro-assembler-x64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 38 matching lines @@
       root_array_available_(true) {
   if (isolate() != NULL) {
     code_object_ = Handle<Object>(isolate()->heap()->undefined_value(),
                                   isolate());
   }
 }
 
 
 static const int kInvalidRootRegisterDelta = -1;
 
+#define __k
+#define __q
+#define __n
 
-intptr_t MacroAssembler::RootRegisterDelta(ExternalReference other) {
+int64_t MacroAssembler::RootRegisterDelta(ExternalReference other) {
   if (predictable_code_size() &&
       (other.address() < reinterpret_cast<Address>(isolate()) ||
        other.address() >= reinterpret_cast<Address>(isolate() + 1))) {
     return kInvalidRootRegisterDelta;
   }
   Address roots_register_value = kRootRegisterBias +
       reinterpret_cast<Address>(isolate()->heap()->roots_array_start());
+#ifndef V8_TARGET_ARCH_X32
   intptr_t delta = other.address() - roots_register_value;
+#else
+  uint64_t o = reinterpret_cast<uint32_t>(other.address());
+  uint64_t r = reinterpret_cast<uint32_t>(roots_register_value);
+  int64_t delta = o - r;
+#endif
   return delta;
 }
 
 
 Operand MacroAssembler::ExternalOperand(ExternalReference target,
                                         Register scratch) {
   if (root_array_available_ && !Serializer::enabled()) {
-    intptr_t delta = RootRegisterDelta(target);
+    int64_t delta = RootRegisterDelta(target);
     if (delta != kInvalidRootRegisterDelta && is_int32(delta)) {
       Serializer::TooLateToEnableNow();
       return Operand(kRootRegister, static_cast<int32_t>(delta));
     }
   }
   movq(scratch, target);
   return Operand(scratch, 0);
 }
 
 
 void MacroAssembler::Load(Register destination, ExternalReference source) {
   if (root_array_available_ && !Serializer::enabled()) {
-    intptr_t delta = RootRegisterDelta(source);
+    int64_t delta = RootRegisterDelta(source);
     if (delta != kInvalidRootRegisterDelta && is_int32(delta)) {
       Serializer::TooLateToEnableNow();
       movq(destination, Operand(kRootRegister, static_cast<int32_t>(delta)));
       return;
     }
   }
   // Safe code.
   if (destination.is(rax)) {
     load_rax(source);
   } else {
     movq(kScratchRegister, source);
     movq(destination, Operand(kScratchRegister, 0));
   }
 }
 
 
 void MacroAssembler::Store(ExternalReference destination, Register source) {
   if (root_array_available_ && !Serializer::enabled()) {
-    intptr_t delta = RootRegisterDelta(destination);
+    int64_t delta = RootRegisterDelta(destination);
     if (delta != kInvalidRootRegisterDelta && is_int32(delta)) {
       Serializer::TooLateToEnableNow();
       movq(Operand(kRootRegister, static_cast<int32_t>(delta)), source);
       return;
     }
   }
   // Safe code.
   if (source.is(rax)) {
     store_rax(destination);
   } else {
     movq(kScratchRegister, destination);
     movq(Operand(kScratchRegister, 0), source);
   }
 }
 
 
 void MacroAssembler::LoadAddress(Register destination,
                                  ExternalReference source) {
   if (root_array_available_ && !Serializer::enabled()) {
-    intptr_t delta = RootRegisterDelta(source);
+    int64_t delta = RootRegisterDelta(source);
     if (delta != kInvalidRootRegisterDelta && is_int32(delta)) {
       Serializer::TooLateToEnableNow();
       lea(destination, Operand(kRootRegister, static_cast<int32_t>(delta)));
       return;
     }
   }
   // Safe code.
   movq(destination, source);
 }
 
 
 int MacroAssembler::LoadAddressSize(ExternalReference source) {
   if (root_array_available_ && !Serializer::enabled()) {
     // This calculation depends on the internals of LoadAddress.
     // It's correctness is ensured by the asserts in the Call
     // instruction below.
-    intptr_t delta = RootRegisterDelta(source);
+    int64_t delta = RootRegisterDelta(source);
     if (delta != kInvalidRootRegisterDelta && is_int32(delta)) {
       Serializer::TooLateToEnableNow();
       // Operand is lea(scratch, Operand(kRootRegister, delta));
       // Opcodes : REX.W 8D ModRM Disp8/Disp32  - 4 or 7.
       int size = 4;
       if (!is_int8(static_cast<int32_t>(delta))) {
         size += 3;  // Need full four-byte displacement in lea.
       }
       return size;
     }
   }
+#ifndef V8_TARGET_ARCH_X32
   // Size of movq(destination, src);
   return 10;
+#else
+  // Size of movl(destination, src);
+  return 6;
+#endif
 }
 
 
 void MacroAssembler::PushAddress(ExternalReference source) {
   int64_t address = reinterpret_cast<int64_t>(source.address());
   if (is_int32(address) && !Serializer::enabled()) {
     if (emit_debug_code()) {
       movq(kScratchRegister, BitCast<int64_t>(kZapValue), RelocInfo::NONE64);
     }
     push(Immediate(static_cast<int32_t>(address)));
@@ skipping 109 matching lines @@
       movq(kScratchRegister, ExternalReference::new_space_mask(isolate()));
       and_(scratch, kScratchRegister);
     } else {
       movq(scratch, ExternalReference::new_space_mask(isolate()));
       and_(scratch, object);
     }
     movq(kScratchRegister, ExternalReference::new_space_start(isolate()));
     cmpq(scratch, kScratchRegister);
     j(cc, branch, distance);
   } else {
+#ifndef V8_TARGET_ARCH_X32
     ASSERT(is_int32(static_cast<int64_t>(HEAP->NewSpaceMask())));
+#endif
     intptr_t new_space_start =
         reinterpret_cast<intptr_t>(HEAP->NewSpaceStart());
-    movq(kScratchRegister, -new_space_start, RelocInfo::NONE64);
+    __n movq(kScratchRegister, -new_space_start, RelocInfo::NONE64);
     if (scratch.is(object)) {
       addq(scratch, kScratchRegister);
     } else {
       lea(scratch, Operand(object, kScratchRegister, times_1, 0));
     }
     and_(scratch, Immediate(static_cast<int32_t>(HEAP->NewSpaceMask())));
     j(cc, branch, distance);
   }
 }
 
@@ skipping 216 matching lines @@
   intptr_t p0 = (p1 & ~kSmiTagMask) + kSmiTag;
   // Note: p0 might not be a valid Smi _value_, but it has a valid Smi tag.
   ASSERT(reinterpret_cast<Object*>(p0)->IsSmi());
 #ifdef DEBUG
   if (msg != NULL) {
     RecordComment("Abort message: ");
     RecordComment(msg);
   }
 #endif
   push(rax);
-  movq(kScratchRegister, p0, RelocInfo::NONE64);
+  __n movq(kScratchRegister, p0, RelocInfo::NONE64);
   push(kScratchRegister);
+#ifndef V8_TARGET_ARCH_X32
   movq(kScratchRegister,
        reinterpret_cast<intptr_t>(Smi::FromInt(static_cast<int>(p1 - p0))),
        RelocInfo::NONE64);
+#else
+  movl(kScratchRegister,
+       reinterpret_cast<intptr_t>(Smi::FromInt(static_cast<int>(p1 - p0))),
+       RelocInfo::NONE32);
+#endif
   push(kScratchRegister);
 
   if (!has_frame_) {
     // We don't actually want to generate a pile of code for this, so just
     // claim there is a stack frame, without generating one.
     FrameScope scope(this, StackFrame::NONE);
     CallRuntime(Runtime::kAbort, 2);
   } else {
     CallRuntime(Runtime::kAbort, 2);
   }
@@ skipping 207 matching lines @@
   cmpb(Operand(rax, 0), Immediate(0));
   j(zero, &profiler_disabled);
 
   // Third parameter is the address of the actual getter function.
   movq(thunk_last_arg, function_address, RelocInfo::EXTERNAL_REFERENCE);
   movq(rax, thunk_address, RelocInfo::EXTERNAL_REFERENCE);
   jmp(&end_profiler_check);
 
   bind(&profiler_disabled);
   // Call the api function!
+#ifndef V8_TARGET_ARCH_X32
   movq(rax, reinterpret_cast<int64_t>(function_address),
        RelocInfo::EXTERNAL_REFERENCE);
+#else
+  movl(rax, reinterpret_cast<uint32_t>(function_address),
+       RelocInfo::EXTERNAL_REFERENCE);
+#endif
 
   bind(&end_profiler_check);
 
   // Call the api function!
   call(rax);
 
   if (FLAG_log_timer_events) {
     FrameScope frame(this, StackFrame::MANUAL);
     PushSafepointRegisters();
     PrepareCallCFunction(1);
@@ skipping 13 matching lines @@
 #endif
     // Check if the result handle holds 0.
     testq(rax, rax);
     j(zero, &empty_result);
     // It was non-zero.  Dereference to get the result value.
     movq(rax, Operand(rax, 0));
     jmp(&prologue);
     bind(&empty_result);
   }
   // Load the value from ReturnValue
+#ifndef V8_TARGET_ARCH_X32
   movq(rax, Operand(rbp, return_value_offset * kPointerSize));
+#else
+  movl(rax,
+       Operand(rbp, 2 * kHWRegSize + (return_value_offset - 2) * kPointerSize));
+#endif
   bind(&prologue);
 
   // No more valid handles (the result handle was the last one). Restore
   // previous handle scope.
   subl(Operand(base_reg, kLevelOffset), Immediate(1));
   movq(Operand(base_reg, kNextOffset), prev_next_address_reg);
   cmpq(prev_limit_reg, Operand(base_reg, kLimitOffset));
   j(not_equal, &delete_allocated_handles);
   bind(&leave_exit_frame);
 
@@ skipping 113 matching lines @@
 void MacroAssembler::PushCallerSaved(SaveFPRegsMode fp_mode,
                                      Register exclusion1,
                                      Register exclusion2,
                                      Register exclusion3) {
   // We don't allow a GC during a store buffer overflow so there is no need to
   // store the registers in any particular way, but we do have to store and
   // restore them.
   for (int i = 0; i < kNumberOfSavedRegs; i++) {
     Register reg = saved_regs[i];
     if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) {
-      push(reg);
+      __k push(reg);
     }
   }
   // R12 to r15 are callee save on all platforms.
   if (fp_mode == kSaveFPRegs) {
     subq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters));
     for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
       XMMRegister reg = XMMRegister::from_code(i);
       movsd(Operand(rsp, i * kDoubleSize), reg);
     }
   }
 }
 
 
 void MacroAssembler::PopCallerSaved(SaveFPRegsMode fp_mode,
                                     Register exclusion1,
                                     Register exclusion2,
                                     Register exclusion3) {
   if (fp_mode == kSaveFPRegs) {
     for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
       XMMRegister reg = XMMRegister::from_code(i);
       movsd(reg, Operand(rsp, i * kDoubleSize));
     }
     addq(rsp, Immediate(kDoubleSize * XMMRegister::kMaxNumRegisters));
   }
   for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) {
     Register reg = saved_regs[i];
     if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) {
-      pop(reg);
+      __k pop(reg);
     }
   }
 }
 
 
 void MacroAssembler::Set(Register dst, int64_t x) {
   if (x == 0) {
     xorl(dst, dst);
   } else if (is_uint32(x)) {
     movl(dst, Immediate(static_cast<uint32_t>(x)));
   } else if (is_int32(x)) {
-    movq(dst, Immediate(static_cast<int32_t>(x)));
+    __k movq(dst, Immediate(static_cast<int32_t>(x)));
   } else {
-    movq(dst, x, RelocInfo::NONE64);
+    __k movq(dst, x, RelocInfo::NONE64);
   }
 }
 
+
+#ifndef V8_TARGET_ARCH_X32
 void MacroAssembler::Set(const Operand& dst, int64_t x) {
   if (is_int32(x)) {
     movq(dst, Immediate(static_cast<int32_t>(x)));
   } else {
     Set(kScratchRegister, x);
     movq(dst, kScratchRegister);
   }
 }
+#else
+void MacroAssembler::Set(const Operand& dst, int32_t x) {
+  movl(dst, Immediate(x));
+}
+#endif
 
 
 bool MacroAssembler::IsUnsafeInt(const int x) {
   static const int kMaxBits = 17;
   return !is_intn(x, kMaxBits);
 }
 
 
+#ifndef V8_TARGET_ARCH_X32
 void MacroAssembler::SafeMove(Register dst, Smi* src) {
   ASSERT(!dst.is(kScratchRegister));
   ASSERT(kSmiValueSize == 32);  // JIT cookie can be converted to Smi.
   if (IsUnsafeInt(src->value()) && jit_cookie() != 0) {
     Move(dst, Smi::FromInt(src->value() ^ jit_cookie()));
     Move(kScratchRegister, Smi::FromInt(jit_cookie()));
     xor_(dst, kScratchRegister);
   } else {
     Move(dst, src);
   }
 }
+#else
+void MacroAssembler::SafeMove(Register dst, Smi* src) {
+  ASSERT(!dst.is(kScratchRegister));
+  ASSERT(kSmiValueSize == 31);  // JIT cookie can be converted to Smi.
+  if (IsUnsafeInt(src->value()) && jit_cookie() != 0) {
+    movl(dst, Immediate(reinterpret_cast<int32_t>(src) ^ jit_cookie()));
+    xorl(dst, Immediate(jit_cookie()));
+  } else {
+    Move(dst, src);
+  }
+}
+#endif
 
 
+#ifndef V8_TARGET_ARCH_X32
 void MacroAssembler::SafePush(Smi* src) {
   ASSERT(kSmiValueSize == 32);  // JIT cookie can be converted to Smi.
   if (IsUnsafeInt(src->value()) && jit_cookie() != 0) {
     Push(Smi::FromInt(src->value() ^ jit_cookie()));
     Move(kScratchRegister, Smi::FromInt(jit_cookie()));
     xor_(Operand(rsp, 0), kScratchRegister);
   } else {
     Push(src);
   }
 }
+#else
+void MacroAssembler::SafePush(Smi* src) {
+  ASSERT(kSmiValueSize == 31);  // JIT cookie can be converted to Smi.
+  if (IsUnsafeInt(src->value()) && jit_cookie() != 0) {
+    Push(Immediate(reinterpret_cast<int32_t>(src) ^ jit_cookie()));
+    xorl(Operand(rsp, 0), Immediate(jit_cookie()));
+  } else {
+    Push(src);
+  }
+}
+#endif
 
 
 // ----------------------------------------------------------------------------
 // Smi tagging, untagging and tag detection.
 
 Register MacroAssembler::GetSmiConstant(Smi* source) {
   int value = source->value();
   if (value == 0) {
     xorl(kScratchRegister, kScratchRegister);
     return kScratchRegister;
   }
   if (value == 1) {
     return kSmiConstantRegister;
   }
   LoadSmiConstant(kScratchRegister, source);
   return kScratchRegister;
 }
 
 void MacroAssembler::LoadSmiConstant(Register dst, Smi* source) {
+#ifndef V8_TARGET_ARCH_X32
   if (emit_debug_code()) {
     movq(dst,
          reinterpret_cast<uint64_t>(Smi::FromInt(kSmiConstantRegisterValue)),
          RelocInfo::NONE64);
     cmpq(dst, kSmiConstantRegister);
     if (allow_stub_calls()) {
       Assert(equal, "Uninitialized kSmiConstantRegister");
     } else {
       Label ok;
       j(equal, &ok, Label::kNear);
       int3();
       bind(&ok);
     }
   }
+#else
+  // Disable check for Uninitialized kSmiConstantRegister for X32.
+#endif
   int value = source->value();
   if (value == 0) {
     xorl(dst, dst);
     return;
   }
   bool negative = value < 0;
   unsigned int uvalue = negative ? -value : value;
 
   switch (uvalue) {
     case 9:
-      lea(dst, Operand(kSmiConstantRegister, kSmiConstantRegister, times_8, 0));
+      lea(dst,
+          Operand(kSmiConstantRegister, kSmiConstantRegister, times_8, 0));
       break;
     case 8:
       xorl(dst, dst);
       lea(dst, Operand(dst, kSmiConstantRegister, times_8, 0));
       break;
     case 4:
       xorl(dst, dst);
       lea(dst, Operand(dst, kSmiConstantRegister, times_4, 0));
       break;
     case 5:
-      lea(dst, Operand(kSmiConstantRegister, kSmiConstantRegister, times_4, 0));
+      lea(dst,
+          Operand(kSmiConstantRegister, kSmiConstantRegister, times_4, 0));
       break;
     case 3:
-      lea(dst, Operand(kSmiConstantRegister, kSmiConstantRegister, times_2, 0));
+      lea(dst,
+          Operand(kSmiConstantRegister, kSmiConstantRegister, times_2, 0));
       break;
     case 2:
-      lea(dst, Operand(kSmiConstantRegister, kSmiConstantRegister, times_1, 0));
+      lea(dst,
+          Operand(kSmiConstantRegister, kSmiConstantRegister, times_1, 0));
       break;
     case 1:
       movq(dst, kSmiConstantRegister);
       break;
     case 0:
       UNREACHABLE();
       return;
     default:
-      movq(dst, reinterpret_cast<uint64_t>(source), RelocInfo::NONE64);
+      __k movq(dst, reinterpret_cast<uint64_t>(source), RelocInfo::NONE64);
       return;
   }
   if (negative) {
     neg(dst);
   }
 }
 
 
 void MacroAssembler::Integer32ToSmi(Register dst, Register src) {
   STATIC_ASSERT(kSmiTag == 0);
   if (!dst.is(src)) {
     movl(dst, src);
   }
   shl(dst, Immediate(kSmiShift));
 }
 
 
 void MacroAssembler::Integer32ToSmiField(const Operand& dst, Register src) {
   if (emit_debug_code()) {
     testb(dst, Immediate(0x01));
     Label ok;
     j(zero, &ok, Label::kNear);
     if (allow_stub_calls()) {
       Abort("Integer32ToSmiField writing to non-smi location");
     } else {
       int3();
     }
     bind(&ok);
   }
+#ifndef V8_TARGET_ARCH_X32
   ASSERT(kSmiShift % kBitsPerByte == 0);
   movl(Operand(dst, kSmiShift / kBitsPerByte), src);
+#else
+  Integer32ToSmi(kScratchRegister, src);
+  movl(dst, kScratchRegister);
+#endif
 }
 
 
 void MacroAssembler::Integer64PlusConstantToSmi(Register dst,
                                                 Register src,
                                                 int constant) {
   if (dst.is(src)) {
     addl(dst, Immediate(constant));
   } else {
     leal(dst, Operand(src, constant));
   }
   shl(dst, Immediate(kSmiShift));
 }
 
 
 void MacroAssembler::SmiToInteger32(Register dst, Register src) {
   STATIC_ASSERT(kSmiTag == 0);
   if (!dst.is(src)) {
     movq(dst, src);
   }
+#ifndef V8_TARGET_ARCH_X32
   shr(dst, Immediate(kSmiShift));
+#else
+  sarl(dst, Immediate(kSmiShift));
+#endif
 }
 
 
 void MacroAssembler::SmiToInteger32(Register dst, const Operand& src) {
+#ifndef V8_TARGET_ARCH_X32
   movl(dst, Operand(src, kSmiShift / kBitsPerByte));
+#else
+  movl(dst, src);
+  sarl(dst, Immediate(kSmiShift));
+#endif
 }
 
 
 void MacroAssembler::SmiToInteger64(Register dst, Register src) {
   STATIC_ASSERT(kSmiTag == 0);
   if (!dst.is(src)) {
     movq(dst, src);
   }
+#ifndef V8_TARGET_ARCH_X32
   sar(dst, Immediate(kSmiShift));
+#else
+  shl(dst, Immediate(32));
+  sar(dst, Immediate(32 + kSmiShift));
+#endif
 }
 
 
 void MacroAssembler::SmiToInteger64(Register dst, const Operand& src) {
+#ifndef V8_TARGET_ARCH_X32
   movsxlq(dst, Operand(src, kSmiShift / kBitsPerByte));
+#else
+  movl(dst, src);
+  SmiToInteger64(dst, dst);
+#endif
 }
 
 
 void MacroAssembler::SmiTest(Register src) {
   testq(src, src);
 }
 
 
 void MacroAssembler::SmiCompare(Register smi1, Register smi2) {
   AssertSmi(smi1);
@@ skipping 28 matching lines @@
 
 void MacroAssembler::SmiCompare(const Operand& dst, Register src) {
   AssertSmi(dst);
   AssertSmi(src);
   cmpq(dst, src);
 }
 
 
 void MacroAssembler::SmiCompare(const Operand& dst, Smi* src) {
   AssertSmi(dst);
+#ifndef V8_TARGET_ARCH_X32
   cmpl(Operand(dst, kSmiShift / kBitsPerByte), Immediate(src->value()));
+#else
+  cmpl(dst, Immediate(src));
+#endif
 }
 
 
 void MacroAssembler::Cmp(const Operand& dst, Smi* src) {
   // The Operand cannot use the smi register.
   Register smi_reg = GetSmiConstant(src);
   ASSERT(!dst.AddressUsesRegister(smi_reg));
   cmpq(dst, smi_reg);
 }
 
 
 void MacroAssembler::SmiCompareInteger32(const Operand& dst, Register src) {
+#ifndef V8_TARGET_ARCH_X32
   cmpl(Operand(dst, kSmiShift / kBitsPerByte), src);
+#else
+  SmiToInteger32(kScratchRegister, dst);
+  cmpl(kScratchRegister, src);
+#endif
 }
 
 
 void MacroAssembler::PositiveSmiTimesPowerOfTwoToInteger64(Register dst,
                                                            Register src,
                                                            int power) {
   ASSERT(power >= 0);
   ASSERT(power < 64);
   if (power == 0) {
     SmiToInteger64(dst, src);
@@ skipping 62 matching lines @@
   testb(kScratchRegister, Immediate(3));
   return zero;
 }
 
 
 Condition MacroAssembler::CheckBothSmi(Register first, Register second) {
   if (first.is(second)) {
     return CheckSmi(first);
   }
   STATIC_ASSERT(kSmiTag == 0 && kHeapObjectTag == 1 && kHeapObjectTagMask == 3);
+#ifndef V8_TARGET_ARCH_X32
   leal(kScratchRegister, Operand(first, second, times_1, 0));
   testb(kScratchRegister, Immediate(0x03));
+#else
+  movl(kScratchRegister, first);
+  orl(kScratchRegister, second);
+  testb(kScratchRegister, Immediate(kSmiTagMask));
+#endif
   return zero;
 }
 
 
 Condition MacroAssembler::CheckBothNonNegativeSmi(Register first,
                                                   Register second) {
   if (first.is(second)) {
     return CheckNonNegativeSmi(first);
   }
   movq(kScratchRegister, first);
@@ skipping 24 matching lines @@
 
 
 Condition MacroAssembler::CheckIsMinSmi(Register src) {
   ASSERT(!src.is(kScratchRegister));
   // If we overflow by subtracting one, it's the minimal smi value.
   cmpq(src, kSmiConstantRegister);
   return overflow;
 }
 
 
+#ifndef V8_TARGET_ARCH_X32
 Condition MacroAssembler::CheckInteger32ValidSmiValue(Register src) {
   // A 32-bit integer value can always be converted to a smi.
   return always;
 }
 
 
 Condition MacroAssembler::CheckUInteger32ValidSmiValue(Register src) {
   // An unsigned 32-bit integer value is valid as long as the high bit
   // is not set.
   testl(src, src);
   return positive;
 }
+#else
+Condition MacroAssembler::CheckInteger32ValidSmiValue(Register src) {
+  cmpl(src, Immediate(0xc0000000));
+  return positive;
+}
+
+
+Condition MacroAssembler::CheckUInteger32ValidSmiValue(Register src) {
+  testl(src, Immediate(0xc0000000));
+  return zero;
+}
+#endif
 
 
 void MacroAssembler::CheckSmiToIndicator(Register dst, Register src) {
   if (dst.is(src)) {
     andl(dst, Immediate(kSmiTagMask));
   } else {
     movl(dst, Immediate(kSmiTagMask));
     andl(dst, src);
   }
 }
@@ skipping 143 matching lines @@
         LoadSmiConstant(dst, constant);
         addq(dst, src);
         return;
     }
   }
 }
 
 
 void MacroAssembler::SmiAddConstant(const Operand& dst, Smi* constant) {
   if (constant->value() != 0) {
+#ifndef V8_TARGET_ARCH_X32
     addl(Operand(dst, kSmiShift / kBitsPerByte), Immediate(constant->value()));
+#else
+    addl(dst, Immediate(constant));
+#endif
   }
 }
 
 
 void MacroAssembler::SmiAddConstant(Register dst,
                                     Register src,
                                     Smi* constant,
                                     Label* on_not_smi_result,
                                     Label::Distance near_jump) {
   if (constant->value() == 0) {
@@ skipping 304 matching lines @@
   }
   SmiToInteger32(rax, src1);
   // We need to rule out dividing Smi::kMinValue by -1, since that would
   // overflow in idiv and raise an exception.
   // We combine this with negative zero test (negative zero only happens
   // when dividing zero by a negative number).
 
   // We overshoot a little and go to slow case if we divide min-value
   // by any negative value, not just -1.
   Label safe_div;
+#ifndef V8_TARGET_ARCH_X32
   testl(rax, Immediate(0x7fffffff));
+#else
+  testl(rax, Immediate(0x3fffffff));
+#endif
   j(not_zero, &safe_div, Label::kNear);
   testq(src2, src2);
   if (src1.is(rax)) {
     j(positive, &safe_div, Label::kNear);
     movq(src1, kScratchRegister);
     jmp(on_not_smi_result, near_jump);
   } else {
     j(negative, on_not_smi_result, near_jump);
   }
   bind(&safe_div);
@@ skipping 74 matching lines @@
   j(negative, on_not_smi_result, near_jump);
   bind(&smi_result);
   Integer32ToSmi(dst, rdx);
 }
 
 
 void MacroAssembler::SmiNot(Register dst, Register src) {
   ASSERT(!dst.is(kScratchRegister));
   ASSERT(!src.is(kScratchRegister));
   // Set tag and padding bits before negating, so that they are zero afterwards.
+#ifndef V8_TARGET_ARCH_X32
   movl(kScratchRegister, Immediate(~0));
+#else
+  movl(kScratchRegister, Immediate(1));
+#endif
   if (dst.is(src)) {
     xor_(dst, kScratchRegister);
   } else {
     lea(dst, Operand(src, kScratchRegister, times_1, 0));
   }
   not_(dst);
 }
 
 
 void MacroAssembler::SmiAnd(Register dst, Register src1, Register src2) {
@@ skipping 94 matching lines @@
   // Logic right shift interprets its result as an *unsigned* number.
   if (dst.is(src)) {
     UNIMPLEMENTED();  // Not used.
   } else {
     movq(dst, src);
     if (shift_value == 0) {
       testq(dst, dst);
       j(negative, on_not_smi_result, near_jump);
     }
     shr(dst, Immediate(shift_value + kSmiShift));
+#ifndef V8_TARGET_ARCH_X32
     shl(dst, Immediate(kSmiShift));
+#else
+    testl(dst, Immediate(0xc0000000));
+    j(not_zero, on_not_smi_result, near_jump);
+    shll(dst, Immediate(kSmiShift));
+#endif
   }
 }
 
 
+#ifndef V8_TARGET_ARCH_X32
 void MacroAssembler::SmiShiftLeft(Register dst,
                                   Register src1,
                                   Register src2) {
   ASSERT(!dst.is(rcx));
   // Untag shift amount.
   if (!dst.is(src1)) {
     movq(dst, src1);
   }
   SmiToInteger32(rcx, src2);
   // Shift amount specified by lower 5 bits, not six as the shl opcode.
   and_(rcx, Immediate(0x1f));
   shl_cl(dst);
 }
+#else
+void MacroAssembler::SmiShiftLeft(Register dst,
+                                  Register src1,
+                                  Register src2,
+                                  Label* on_not_smi_result) {
+  ASSERT(!dst.is(kScratchRegister));
+  ASSERT(!src1.is(kScratchRegister));
+  ASSERT(!src2.is(kScratchRegister));
+  ASSERT(!dst.is(rcx));
+  Label result_ok;
+
+  if (src1.is(rcx) || src2.is(rcx)) {
+    movl(kScratchRegister, rcx);
+  }
+  // Untag shift amount.
+  if (!dst.is(src1)) {
+    movl(dst, src1);
+  }
+  SmiToInteger32(dst, dst);
+  SmiToInteger32(rcx, src2);
+  // Shift amount specified by lower 5 bits, not six as the shl opcode.
+  andl(rcx, Immediate(0x1f));
+  shll_cl(dst);
+  cmpl(dst, Immediate(0xc0000000));
+  j(not_sign, &result_ok);
+  if (src1.is(rcx) || src2.is(rcx)) {
+    if (src1.is(rcx)) {
+      movl(src1, kScratchRegister);
+    } else {
+      movl(src2, kScratchRegister);
+    }
+  }
+  jmp(on_not_smi_result);
+  bind(&result_ok);
+  Integer32ToSmi(dst, dst);
+}
+#endif
 
 
 void MacroAssembler::SmiShiftLogicalRight(Register dst,
                                           Register src1,
                                           Register src2,
                                           Label* on_not_smi_result,
                                           Label::Distance near_jump) {
+#ifndef V8_TARGET_ARCH_X32
   ASSERT(!dst.is(kScratchRegister));
   ASSERT(!src1.is(kScratchRegister));
   ASSERT(!src2.is(kScratchRegister));
   ASSERT(!dst.is(rcx));
   // dst and src1 can be the same, because the one case that bails out
   // is a shift by 0, which leaves dst, and therefore src1, unchanged.
   if (src1.is(rcx) || src2.is(rcx)) {
     movq(kScratchRegister, rcx);
   }
   if (!dst.is(src1)) {
@@ skipping 11 matching lines @@
       movq(src1, kScratchRegister);
     } else {
       movq(src2, kScratchRegister);
     }
     jmp(on_not_smi_result, near_jump);
     bind(&positive_result);
   } else {
     // src2 was zero and src1 negative.
     j(negative, on_not_smi_result, near_jump);
   }
+#else
+  ASSERT(!dst.is(kScratchRegister));
+  ASSERT(!src1.is(kScratchRegister));
+  ASSERT(!src2.is(kScratchRegister));
+  ASSERT(!dst.is(rcx));
+  Label result_ok;
+
+  // dst and src1 can be the same, because the one case that bails out
+  // is a shift by 0, which leaves dst, and therefore src1, unchanged.
+  if (src1.is(rcx) || src2.is(rcx)) {
+    movl(kScratchRegister, rcx);
+  }
+  if (!dst.is(src1)) {
+    movq(dst, src1);
+  }
+  SmiToInteger32(rcx, src2);
+  SmiToInteger32(dst, dst);
+  shrl_cl(dst);
+  testl(dst, Immediate(0xc0000000));
+  j(zero, &result_ok);
+  if (src1.is(rcx) || src2.is(rcx)) {
+    if (src1.is(rcx)) {
+      movl(src1, kScratchRegister);
+    } else {
+      movl(src2, kScratchRegister);
+    }
+  }
+  jmp(on_not_smi_result);
+  bind(&result_ok);
+  Integer32ToSmi(dst, dst);
+#endif
 }
 
 
 void MacroAssembler::SmiShiftArithmeticRight(Register dst,
                                              Register src1,
                                              Register src2) {
   ASSERT(!dst.is(kScratchRegister));
   ASSERT(!src1.is(kScratchRegister));
   ASSERT(!src2.is(kScratchRegister));
   ASSERT(!dst.is(rcx));
   if (src1.is(rcx)) {
     movq(kScratchRegister, src1);
   } else if (src2.is(rcx)) {
     movq(kScratchRegister, src2);
   }
   if (!dst.is(src1)) {
     movq(dst, src1);
   }
   SmiToInteger32(rcx, src2);
+#ifndef V8_TARGET_ARCH_X32
   orl(rcx, Immediate(kSmiShift));
+#else
+  SmiToInteger32(dst, dst);
+#endif
   sar_cl(dst);  // Shift 32 + original rcx & 0x1f.
   shl(dst, Immediate(kSmiShift));
   if (src1.is(rcx)) {
     movq(src1, kScratchRegister);
   } else if (src2.is(rcx)) {
     movq(src2, kScratchRegister);
   }
 }
 
 
@@ skipping 28 matching lines @@
   subq(kScratchRegister, Immediate(1));
   // If src1 is a smi, then scratch register all 1s, else it is all 0s.
   movq(dst, src1);
   xor_(dst, src2);
   and_(dst, kScratchRegister);
   // If src1 is a smi, dst holds src1 ^ src2, else it is zero.
   xor_(dst, src1);
   // If src1 is a smi, dst is src2, else it is src1, i.e., the non-smi.
 }
 
-
+#ifndef V8_TARGET_ARCH_X32
 SmiIndex MacroAssembler::SmiToIndex(Register dst,
                                     Register src,
                                     int shift) {
   ASSERT(is_uint6(shift));
   // There is a possible optimization if shift is in the range 60-63, but that
   // will (and must) never happen.
   if (!dst.is(src)) {
     movq(dst, src);
   }
   if (shift < kSmiShift) {
     sar(dst, Immediate(kSmiShift - shift));
   } else {
     shl(dst, Immediate(shift - kSmiShift));
   }
   return SmiIndex(dst, times_1);
 }
+#else
+SmiIndex MacroAssembler::SmiToIndex(Register dst,
+                                    Register src,
+                                    int shift) {
+  ASSERT(shift >= times_1 && shift <= times_8);
+  if (!dst.is(src)) {
+    movl(dst, src);
+  }
+  if (shift == times_1) {
+    sarl(dst, Immediate(kSmiShift));
+    return SmiIndex(dst, times_1);
+  }
+  return SmiIndex(dst, static_cast<ScaleFactor>(shift - 1));
+}
+#endif
 
+
+#ifndef V8_TARGET_ARCH_X32
 SmiIndex MacroAssembler::SmiToNegativeIndex(Register dst,
                                             Register src,
                                             int shift) {
   // Register src holds a positive smi.
   ASSERT(is_uint6(shift));
   if (!dst.is(src)) {
     movq(dst, src);
   }
   neg(dst);
   if (shift < kSmiShift) {
     sar(dst, Immediate(kSmiShift - shift));
   } else {
     shl(dst, Immediate(shift - kSmiShift));
   }
   return SmiIndex(dst, times_1);
 }
+#else
+SmiIndex MacroAssembler::SmiToNegativeIndex(Register dst,
+                                            Register src,
+                                            int shift) {
+  // Register src holds a positive smi.
+  ASSERT(shift >= times_1 && shift <= times_8);
+  if (!dst.is(src)) {
+    movl(dst, src);
+  }
+  neg(dst);
+  if (shift == times_1) {
+    sar(dst, Immediate(kSmiShift));
+    return SmiIndex(dst, times_1);
+  }
+  return SmiIndex(dst, static_cast<ScaleFactor>(shift - 1));
+}
+#endif
 
 
 void MacroAssembler::AddSmiField(Register dst, const Operand& src) {
+#ifndef V8_TARGET_ARCH_X32
   ASSERT_EQ(0, kSmiShift % kBitsPerByte);
   addl(dst, Operand(src, kSmiShift / kBitsPerByte));
+#else
+  SmiToInteger32(kScratchRegister, src);
+  addl(dst, kScratchRegister);
+#endif
 }
 
 
 void MacroAssembler::JumpIfNotString(Register object,
                                      Register object_map,
                                      Label* not_string,
                                      Label::Distance near_jump) {
   Condition is_smi = CheckSmi(object);
   j(is_smi, not_string, near_jump);
   CmpObjectType(object, FIRST_NONSTRING_TYPE, object_map);
@@ skipping 216 matching lines @@
   if (dst.is(rax)) {
     AllowDeferredHandleDereference embedding_raw_address;
     load_rax(cell.location(), RelocInfo::CELL);
   } else {
     movq(dst, cell, RelocInfo::CELL);
     movq(dst, Operand(dst, 0));
   }
 }
 
 
+#ifdef V8_TARGET_ARCH_X32
+void MacroAssembler::Push(Immediate value) {
+  leal(rsp, Operand(rsp, -4));
+  movl(Operand(rsp, 0), value);
+}
+
+
+void MacroAssembler::Push_imm32(int32_t imm32) {
+  leal(rsp, Operand(rsp, -4));
+  movl(Operand(rsp, 0), Immediate(imm32));
+}
+
+
+void MacroAssembler::Push(Register src) {
+  // We use 64-bit push for rbp in the prologue
+  ASSERT(src.code() != rbp.code());
+  leal(rsp, Operand(rsp, -4));
+  movl(Operand(rsp, 0), src);
+}
+
+
+void MacroAssembler::Push(const Operand& src) {
+  movl(kScratchRegister, src);
+  leal(rsp, Operand(rsp, -4));
+  movl(Operand(rsp, 0), kScratchRegister);
+}
+
+
+void MacroAssembler::Pop(Register dst) {
+  // We use 64-bit push for rbp in the prologue
+  ASSERT(dst.code() != rbp.code());
+  movl(dst, Operand(rsp, 0));
+  leal(rsp, Operand(rsp, 4));
+}
+
+
+void MacroAssembler::Pop(const Operand& dst) {
+  Register scratch = kScratchRegister;
+  bool needExtraScratch = dst.AddressUsesRegister(kScratchRegister);
+  if (needExtraScratch) {
+    scratch = kSmiConstantRegister;
+  }
+  movl(scratch, Operand(rsp, 0));
+  movl(dst, scratch);
+  if (needExtraScratch) {
+    // Restore the value of kSmiConstantRegister.
+    // Should use InitializeSmiConstantRegister();
+    movl(kSmiConstantRegister,
+         reinterpret_cast<uint32_t>(Smi::FromInt(kSmiConstantRegisterValue)),
+         RelocInfo::NONE32);
+  }
+  leal(rsp, Operand(rsp, 4));
+}
+#endif
+
+
 void MacroAssembler::Push(Smi* source) {
   intptr_t smi = reinterpret_cast<intptr_t>(source);
   if (is_int32(smi)) {
     push(Immediate(static_cast<int32_t>(smi)));
   } else {
     Register constant = GetSmiConstant(source);
     push(constant);
   }
 }
 
 
 void MacroAssembler::Drop(int stack_elements) {
   if (stack_elements > 0) {
     addq(rsp, Immediate(stack_elements * kPointerSize));
   }
 }
 
 
 void MacroAssembler::Test(const Operand& src, Smi* source) {
+#ifndef V8_TARGET_ARCH_X32
   testl(Operand(src, kIntSize), Immediate(source->value()));
+#else
+  testl(src, Immediate(source));
+#endif
 }
 
 
 void MacroAssembler::TestBit(const Operand& src, int bits) {
+#ifdef V8_TARGET_ARCH_X32
+  // Pointer fields in SharedFunctionInfo are SMI.
+  bits +=  kSmiTagSize + kSmiShiftSize;
+#endif
   int byte_offset = bits / kBitsPerByte;
   int bit_in_byte = bits & (kBitsPerByte - 1);
   testb(Operand(src, byte_offset), Immediate(1 << bit_in_byte));
 }
 
 
+#ifdef V8_TARGET_ARCH_X32
+void MacroAssembler::Jump(const Operand& src) {
+  movl(kScratchRegister, src);
+  jmp(kScratchRegister);
+}
+#endif
+
+
 void MacroAssembler::Jump(ExternalReference ext) {
   LoadAddress(kScratchRegister, ext);
   jmp(kScratchRegister);
 }
 
 
 void MacroAssembler::Jump(Address destination, RelocInfo::Mode rmode) {
   movq(kScratchRegister, destination, rmode);
   jmp(kScratchRegister);
 }
@@ skipping 17 matching lines @@
   int end_position = pc_offset() + CallSize(ext);
 #endif
   LoadAddress(kScratchRegister, ext);
   call(kScratchRegister);
 #ifdef DEBUG
   CHECK_EQ(end_position, pc_offset());
 #endif
 }
 
 
+#ifdef V8_TARGET_ARCH_X32
+void MacroAssembler::Call(const Operand& op) {
+  movl(kScratchRegister, op);
+  call(kScratchRegister);
+}
+#endif
+
+
 void MacroAssembler::Call(Address destination, RelocInfo::Mode rmode) {
 #ifdef DEBUG
   int end_position = pc_offset() + CallSize(destination, rmode);
 #endif
   movq(kScratchRegister, destination, rmode);
   call(kScratchRegister);
 #ifdef DEBUG
   CHECK_EQ(pc_offset(), end_position);
 #endif
 }
@@ skipping 101 matching lines @@
 
 
 Operand MacroAssembler::SafepointRegisterSlot(Register reg) {
   return Operand(rsp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
 }
 
 
 void MacroAssembler::PushTryHandler(StackHandler::Kind kind,
                                     int handler_index) {
   // Adjust this code if not the case.
+#ifndef V8_TARGET_ARCH_X32
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
+#else
+  STATIC_ASSERT(StackHandlerConstants::kSize == 4 * kPointerSize + kHWRegSize);
+#endif
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // We will build up the handler from the bottom by pushing on the stack.
   // First push the frame pointer and context.
   if (kind == StackHandler::JS_ENTRY) {
     // The frame pointer does not point to a JS frame so we save NULL for
     // rbp. We expect the code throwing an exception to check rbp before
     // dereferencing it to restore the context.
-    push(Immediate(0));  // NULL frame pointer.
+    __k push(Immediate(0));  // NULL frame pointer.
     Push(Smi::FromInt(0));  // No context.
   } else {
     push(rbp);
     push(rsi);
   }
 
   // Push the state and the code object.
   unsigned state =
       StackHandler::IndexField::encode(handler_index) |
       StackHandler::KindField::encode(kind);
@@ skipping 25 matching lines @@
   movq(rdx,
        FieldOperand(rbx, rdx, times_pointer_size, FixedArray::kHeaderSize));
   SmiToInteger64(rdx, rdx);
   lea(rdi, FieldOperand(rdi, rdx, times_1, Code::kHeaderSize));
   jmp(rdi);
 }
 
 
 void MacroAssembler::Throw(Register value) {
   // Adjust this code if not the case.
+#ifndef V8_TARGET_ARCH_X32
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
+#else
+  STATIC_ASSERT(StackHandlerConstants::kSize == 4 * kPointerSize + kHWRegSize);
+#endif
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in rax.
   if (!value.is(rax)) {
     movq(rax, value);
   }
@@ skipping 19 matching lines @@
   j(zero, &skip, Label::kNear);
   movq(Operand(rbp, StandardFrameConstants::kContextOffset), rsi);
   bind(&skip);
 
   JumpToHandlerEntry();
 }
 
 
 void MacroAssembler::ThrowUncatchable(Register value) {
   // Adjust this code if not the case.
+#ifndef V8_TARGET_ARCH_X32
   STATIC_ASSERT(StackHandlerConstants::kSize == 5 * kPointerSize);
+#else
+  STATIC_ASSERT(StackHandlerConstants::kSize == 4 * kPointerSize + kHWRegSize);
+#endif
   STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
   STATIC_ASSERT(StackHandlerConstants::kCodeOffset == 1 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kStateOffset == 2 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kContextOffset == 3 * kPointerSize);
   STATIC_ASSERT(StackHandlerConstants::kFPOffset == 4 * kPointerSize);
 
   // The exception is expected in rax.
   if (!value.is(rax)) {
     movq(rax, value);
   }
@@ skipping 30 matching lines @@
 
 void MacroAssembler::Ret() {
   ret(0);
 }
 
 
 void MacroAssembler::Ret(int bytes_dropped, Register scratch) {
   if (is_uint16(bytes_dropped)) {
     ret(bytes_dropped);
   } else {
-    pop(scratch);
+    __k pop(scratch);
     addq(rsp, Immediate(bytes_dropped));
-    push(scratch);
+    __k push(scratch);
     ret(0);
   }
 }
 
 
 void MacroAssembler::FCmp() {
   fucomip();
   fstp(0);
 }
 
@@ skipping 245 matching lines @@
   if (emit_debug_code()) {
     Condition is_smi = CheckSmi(object);
     Check(is_smi, "Operand is not a smi");
   }
 }
 
 
 void MacroAssembler::AssertZeroExtended(Register int32_register) {
   if (emit_debug_code()) {
     ASSERT(!int32_register.is(kScratchRegister));
-    movq(kScratchRegister, 0x100000000l, RelocInfo::NONE64);
-    cmpq(kScratchRegister, int32_register);
+    __k movq(kScratchRegister, 0x100000000l, RelocInfo::NONE64);
+    __k cmpq(kScratchRegister, int32_register);
     Check(above_equal, "32 bit value in register is not zero-extended");
   }
 }
 
 
 void MacroAssembler::AssertString(Register object) {
   if (emit_debug_code()) {
     testb(object, Immediate(kSmiTagMask));
     Check(not_equal, "Operand is a smi and not a string");
     push(object);
@@ skipping 249 matching lines @@
                                     const ParameterCount& actual,
                                     InvokeFlag flag,
                                     const CallWrapper& call_wrapper,
                                     CallKind call_kind) {
   // You can't call a function without a valid frame.
   ASSERT(flag == JUMP_FUNCTION || has_frame());
 
   ASSERT(function.is(rdi));
   movq(rdx, FieldOperand(function, JSFunction::kSharedFunctionInfoOffset));
   movq(rsi, FieldOperand(function, JSFunction::kContextOffset));
+#ifndef V8_TARGET_ARCH_X32
   movsxlq(rbx,
           FieldOperand(rdx, SharedFunctionInfo::kFormalParameterCountOffset));
+#else
+  movl(rbx,
+       FieldOperand(rdx, SharedFunctionInfo::kFormalParameterCountOffset));
+  SmiToInteger32(rbx, rbx);
+#endif
   // Advances rdx to the end of the Code object header, to the start of
   // the executable code.
   movq(rdx, FieldOperand(rdi, JSFunction::kCodeEntryOffset));
 
   ParameterCount expected(rbx);
   InvokeCode(rdx, expected, actual, flag, call_wrapper, call_kind);
 }
 
 
 void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
@@ skipping 117 matching lines @@
     Check(equal, "stack frame types must match");
   }
   movq(rsp, rbp);
   pop(rbp);
 }
 
 
 void MacroAssembler::EnterExitFramePrologue(bool save_rax) {
   // Set up the frame structure on the stack.
   // All constants are relative to the frame pointer of the exit frame.
+#ifndef V8_TARGET_ARCH_X32
   ASSERT(ExitFrameConstants::kCallerSPDisplacement == +2 * kPointerSize);
   ASSERT(ExitFrameConstants::kCallerPCOffset == +1 * kPointerSize);
+#else
+  ASSERT(ExitFrameConstants::kCallerSPDisplacement == +2 * kHWRegSize);
+  ASSERT(ExitFrameConstants::kCallerPCOffset == +1 * kHWRegSize);
+#endif
   ASSERT(ExitFrameConstants::kCallerFPOffset ==  0 * kPointerSize);
   push(rbp);
   movq(rbp, rsp);
 
   // Reserve room for entry stack pointer and push the code object.
   ASSERT(ExitFrameConstants::kSPOffset == -1 * kPointerSize);
+#ifndef V8_TARGET_ARCH_X32
   push(Immediate(0));  // Saved entry sp, patched before call.
   movq(kScratchRegister, CodeObject(), RelocInfo::EMBEDDED_OBJECT);
   push(kScratchRegister);  // Accessed from EditFrame::code_slot.
+#else
+  movl(kScratchRegister, CodeObject(), RelocInfo::EMBEDDED_OBJECT);
+  push(kScratchRegister);  // Accessed from EditFrame::code_slot.
+#endif
 
   // Save the frame pointer and the context in top.
   if (save_rax) {
     movq(r14, rax);  // Backup rax in callee-save register.
   }
 
   Store(ExternalReference(Isolate::kCEntryFPAddress, isolate()), rbp);
   Store(ExternalReference(Isolate::kContextAddress, isolate()), rsi);
 }
 
 
 void MacroAssembler::EnterExitFrameEpilogue(int arg_stack_space,
                                             bool save_doubles) {
 #ifdef _WIN64
   const int kShadowSpace = 4;
   arg_stack_space += kShadowSpace;
 #endif
   // Optionally save all XMM registers.
   if (save_doubles) {
     int space = XMMRegister::kMaxNumRegisters * kDoubleSize +
-        arg_stack_space * kPointerSize;
+    __q arg_stack_space * kPointerSize;
     subq(rsp, Immediate(space));
     int offset = -2 * kPointerSize;
+#ifndef V8_TARGET_ARCH_X32
     for (int i = 0; i < XMMRegister::NumAllocatableRegisters(); i++) {
       XMMRegister reg = XMMRegister::FromAllocationIndex(i);
       movsd(Operand(rbp, offset - ((i + 1) * kDoubleSize)), reg);
     }
+#else
+    for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
+      XMMRegister reg = XMMRegister::from_code(i);
+      movsd(Operand(rbp, offset - ((i + 1) * kDoubleSize)), reg);
+    }
+#endif
   } else if (arg_stack_space > 0) {
-    subq(rsp, Immediate(arg_stack_space * kPointerSize));
+    __q subq(rsp, Immediate(arg_stack_space * kPointerSize));
   }
 
   // Get the required frame alignment for the OS.
   const int kFrameAlignment = OS::ActivationFrameAlignment();
   if (kFrameAlignment > 0) {
     ASSERT(IsPowerOf2(kFrameAlignment));
     ASSERT(is_int8(kFrameAlignment));
     and_(rsp, Immediate(-kFrameAlignment));
   }
 
@@ skipping 18 matching lines @@
   EnterExitFramePrologue(false);
   EnterExitFrameEpilogue(arg_stack_space, false);
 }
 
 
 void MacroAssembler::LeaveExitFrame(bool save_doubles) {
   // Registers:
   // r15 : argv
   if (save_doubles) {
     int offset = -2 * kPointerSize;
+#ifndef V8_TARGET_ARCH_X32
     for (int i = 0; i < XMMRegister::NumAllocatableRegisters(); i++) {
       XMMRegister reg = XMMRegister::FromAllocationIndex(i);
       movsd(reg, Operand(rbp, offset - ((i + 1) * kDoubleSize)));
     }
+#else
+    for (int i = 0; i < XMMRegister::kMaxNumRegisters; i++) {
+      XMMRegister reg = XMMRegister::from_code(i);
+      movsd(reg, Operand(rbp, offset - ((i + 1) * kDoubleSize)));
+    }
+#endif
   }
   // Get the return address from the stack and restore the frame pointer.
-  movq(rcx, Operand(rbp, 1 * kPointerSize));
+  __q movq(rcx, Operand(rbp, 1 * kPointerSize));
   movq(rbp, Operand(rbp, 0 * kPointerSize));
 
   // Drop everything up to and including the arguments and the receiver
   // from the caller stack.
   lea(rsp, Operand(r15, 1 * kPointerSize));
 
   // Push the return address to get ready to return.
-  push(rcx);
+  __k push(rcx);
 
   LeaveExitFrameEpilogue();
 }
 
 
 void MacroAssembler::LeaveApiExitFrame() {
   movq(rsp, rbp);
   pop(rbp);
 
   LeaveExitFrameEpilogue();
@@ skipping 270 matching lines @@
     jmp(gc_required);
     return;
   }
   ASSERT(!result.is(result_end));
 
   // Load address of new object into result.
   LoadAllocationTopHelper(result, scratch, flags);
 
   // Align the next allocation. Storing the filler map without checking top is
   // always safe because the limit of the heap is always aligned.
+#ifndef V8_TARGET_ARCH_X32
   if (((flags & DOUBLE_ALIGNMENT) != 0) && FLAG_debug_code) {
     testq(result, Immediate(kDoubleAlignmentMask));
     Check(zero, "Allocation is not double aligned");
   }
+#else
+  if ((flags & DOUBLE_ALIGNMENT) != 0) {
+    ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
+    ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
+    Label aligned;
+    testl(result, Immediate(kDoubleAlignmentMask));
+    j(zero, &aligned, Label::kNear);
+    LoadRoot(kScratchRegister, Heap::kOnePointerFillerMapRootIndex);
+    movl(Operand(result, 0), kScratchRegister);
+    addl(result, Immediate(kDoubleSize / 2));
+    bind(&aligned);
+  }
+#endif
 
   // Calculate new top and bail out if new space is exhausted.
   ExternalReference allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
 
   Register top_reg = result_end.is_valid() ? result_end : result;
 
   if (!top_reg.is(result)) {
     movq(top_reg, result);
   }
@@ skipping 43 matching lines @@
     jmp(gc_required);
     return;
   }
   ASSERT(!result.is(result_end));
 
   // Load address of new object into result.
   LoadAllocationTopHelper(result, scratch, flags);
 
   // Align the next allocation. Storing the filler map without checking top is
   // always safe because the limit of the heap is always aligned.
+#ifndef V8_TARGET_ARCH_X32
   if (((flags & DOUBLE_ALIGNMENT) != 0) && FLAG_debug_code) {
     testq(result, Immediate(kDoubleAlignmentMask));
     Check(zero, "Allocation is not double aligned");
   }
+#else
+  if ((flags & DOUBLE_ALIGNMENT) != 0) {
+    ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
+    ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
+    Label aligned;
+    testl(result, Immediate(kDoubleAlignmentMask));
+    j(zero, &aligned, Label::kNear);
+    LoadRoot(kScratchRegister, Heap::kOnePointerFillerMapRootIndex);
+    movl(Operand(result, 0), kScratchRegister);
+    addl(result, Immediate(kDoubleSize / 2));
+    bind(&aligned);
+  }
+#endif
 
   // Calculate new top and bail out if new space is exhausted.
   ExternalReference allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
 
   // We assume that element_count*element_size + header_size does not
   // overflow.
   lea(result_end, Operand(element_count, element_size, header_size));
   addq(result_end, result);
   j(carry, gc_required);
@@ skipping 30 matching lines @@
       // object_size is left unchanged by this function.
     }
     jmp(gc_required);
     return;
   }
   ASSERT(!result.is(result_end));
 
   // Load address of new object into result.
   LoadAllocationTopHelper(result, scratch, flags);
 
+  // Align the next allocation. Storing the filler map without checking top is
+  // always safe because the limit of the heap is always aligned.
+#ifndef V8_TARGET_ARCH_X32
+  if (((flags & DOUBLE_ALIGNMENT) != 0) && FLAG_debug_code) {
+    testq(result, Immediate(kDoubleAlignmentMask));
+    Check(zero, "Allocation is not double aligned");
+  }
+#else
+  if ((flags & DOUBLE_ALIGNMENT) != 0) {
+    ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);
+    ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
+    Label aligned;
+    testl(result, Immediate(kDoubleAlignmentMask));
+    j(zero, &aligned, Label::kNear);
+    LoadRoot(kScratchRegister, Heap::kOnePointerFillerMapRootIndex);
+    movl(Operand(result, 0), kScratchRegister);
+    addl(result, Immediate(kDoubleSize / 2));
+    bind(&aligned);
+  }
+#endif
+
   // Calculate new top and bail out if new space is exhausted.
   ExternalReference allocation_limit =
       AllocationUtils::GetAllocationLimitReference(isolate(), flags);
   if (!object_size.is(result_end)) {
     movq(result_end, object_size);
   }
   addq(result_end, result);
   j(carry, gc_required);
   Operand limit_operand = ExternalOperand(allocation_limit);
   cmpq(result_end, limit_operand);
   j(above, gc_required);
 
   // Update allocation top.
   UpdateAllocationTopHelper(result_end, scratch, flags);
 
-  // Align the next allocation. Storing the filler map without checking top is
-  // always safe because the limit of the heap is always aligned.
-  if (((flags & DOUBLE_ALIGNMENT) != 0) && FLAG_debug_code) {
-    testq(result, Immediate(kDoubleAlignmentMask));
-    Check(zero, "Allocation is not double aligned");
-  }
-
   // Tag the result if requested.
   if ((flags & TAG_OBJECT) != 0) {
     addq(result, Immediate(kHeapObjectTag));
   }
 }
 
 
 void MacroAssembler::UndoAllocationInNewSpace(Register object) {
   ExternalReference new_space_allocation_top =
       ExternalReference::new_space_allocation_top_address(isolate());
@@ skipping 396 matching lines @@
 void MacroAssembler::PrepareCallCFunction(int num_arguments) {
   int frame_alignment = OS::ActivationFrameAlignment();
   ASSERT(frame_alignment != 0);
   ASSERT(num_arguments >= 0);
 
   // Make stack end at alignment and allocate space for arguments and old rsp.
   movq(kScratchRegister, rsp);
   ASSERT(IsPowerOf2(frame_alignment));
   int argument_slots_on_stack =
       ArgumentStackSlotsForCFunctionCall(num_arguments);
-  subq(rsp, Immediate((argument_slots_on_stack + 1) * kPointerSize));
+  __q subq(rsp, Immediate((argument_slots_on_stack + 1) * kPointerSize));
   and_(rsp, Immediate(-frame_alignment));
+#ifndef V8_TARGET_ARCH_X32
   movq(Operand(rsp, argument_slots_on_stack * kPointerSize), kScratchRegister);
+#else
+  movq(Operand(rsp, argument_slots_on_stack * kHWRegSize), kScratchRegister);
+#endif
 }
 
 
 void MacroAssembler::CallCFunction(ExternalReference function,
                                    int num_arguments) {
   LoadAddress(rax, function);
   CallCFunction(rax, num_arguments);
 }
 
 
 void MacroAssembler::CallCFunction(Register function, int num_arguments) {
   ASSERT(has_frame());
   // Check stack alignment.
   if (emit_debug_code()) {
     CheckStackAlignment();
   }
 
   call(function);
   ASSERT(OS::ActivationFrameAlignment() != 0);
   ASSERT(num_arguments >= 0);
   int argument_slots_on_stack =
       ArgumentStackSlotsForCFunctionCall(num_arguments);
-  movq(rsp, Operand(rsp, argument_slots_on_stack * kPointerSize));
+  __q movq(rsp, Operand(rsp, argument_slots_on_stack * kPointerSize));
 }
 
 
 bool AreAliased(Register r1, Register r2, Register r3, Register r4) {
   if (r1.is(r2)) return true;
   if (r1.is(r3)) return true;
   if (r1.is(r4)) return true;
   if (r2.is(r3)) return true;
   if (r2.is(r4)) return true;
   if (r3.is(r4)) return true;
@@ skipping 276 matching lines @@
   movq(kScratchRegister, new_space_start);
   cmpq(scratch_reg, kScratchRegister);
   j(less, &no_info_available);
   cmpq(scratch_reg, ExternalOperand(new_space_allocation_top));
   j(greater, &no_info_available);
   CompareRoot(MemOperand(scratch_reg, -AllocationSiteInfo::kSize),
               Heap::kAllocationSiteInfoMapRootIndex);
   bind(&no_info_available);
 }
 
+#undef __n
+#undef __q
+#undef __k
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64