Add X32 port into V8

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 360 matching lines @@
   };
 }
 
 
 // -----------------------------------------------------------------------------
 // Machine instruction Immediates
 
 class Immediate BASE_EMBEDDED {
  public:
   explicit Immediate(int32_t value) : value_(value) {}
+#ifdef V8_TARGET_ARCH_X32
+  explicit Immediate(Smi* value) {
+    value_ = reinterpret_cast<intptr_t>(value);
+  }
+#endif
 
  private:
   int32_t value_;
 
   friend class Assembler;
 };
 
 
 // -----------------------------------------------------------------------------
 // Machine instruction Operands
 
 enum ScaleFactor {
   times_1 = 0,
   times_2 = 1,
   times_4 = 2,
   times_8 = 3,
   times_int_size = times_4,
+#ifndef V8_TARGET_ARCH_X32
   times_pointer_size = times_8

[danno, 2013/07/17 13:33:21]

Make this cross platform with:
times_pointer_size = (kPointerSize == 8) ? times_8 : times_4;

+#else
+  times_pointer_size = times_4
+#endif
 };
 
 
 class Operand BASE_EMBEDDED {
  public:
   // [base + disp/r]
   Operand(Register base, int32_t disp);
 
   // [base + index*scale + disp/r]
   Operand(Register base,
@@ skipping 167 matching lines @@
   inline Address runtime_entry_at(Address pc);
   // Number of bytes taken up by the branch target in the code.
   static const int kSpecialTargetSize = 4;  // Use 32-bit displacement.
   // Distance between the address of the code target in the call instruction
   // and the return address pushed on the stack.
   static const int kCallTargetAddressOffset = 4;  // Use 32-bit displacement.
   // Distance between the start of the JS return sequence and where the
   // 32-bit displacement of a near call would be, relative to the pushed
   // return address.  TODO: Use return sequence length instead.
   // Should equal Debug::kX64JSReturnSequenceLength - kCallTargetAddressOffset;
+#ifndef V8_TARGET_ARCH_X32
   static const int kPatchReturnSequenceAddressOffset = 13 - 4;
+#else
+  static const int kPatchReturnSequenceAddressOffset = 9 - 4;

[danno, 2013/07/17 13:33:21]

In these constants and below, you can use kRegisterSize or other constants to
avoid the #ifdefs

+#endif
   // Distance between start of patched debug break slot and where the
   // 32-bit displacement of a near call would be, relative to the pushed
   // return address.  TODO: Use return sequence length instead.
   // Should equal Debug::kX64JSReturnSequenceLength - kCallTargetAddressOffset;
+#ifndef V8_TARGET_ARCH_X32
   static const int kPatchDebugBreakSlotAddressOffset = 13 - 4;
+#else
+  static const int kPatchDebugBreakSlotAddressOffset = 9 - 4;
+#endif
   // TODO(X64): Rename this, removing the "Real", after changing the above.
   static const int kRealPatchReturnSequenceAddressOffset = 2;
 
   // Some x64 JS code is padded with int3 to make it large
   // enough to hold an instruction when the debugger patches it.
   static const int kJumpInstructionLength = 13;
+#ifndef V8_TARGET_ARCH_X32
   static const int kCallInstructionLength = 13;
   static const int kJSReturnSequenceLength = 13;
+#else
+  static const int kCallInstructionLength = 9;
+  static const int kJSReturnSequenceLength = 9;
+#endif
   static const int kShortCallInstructionLength = 5;
   static const int kPatchDebugBreakSlotReturnOffset = 4;
 
   // The debug break slot must be able to contain a call instruction.
   static const int kDebugBreakSlotLength = kCallInstructionLength;
 
   // One byte opcode for test eax,0xXXXXXXXX.
   static const byte kTestEaxByte = 0xA9;
   // One byte opcode for test al, 0xXX.
   static const byte kTestAlByte = 0xA8;
@@ skipping 71 matching lines @@
   // Move 64 bit register value to 64-bit memory location.
   void movq(const Operand& dst, Register src);
   // Move 64 bit memory location to 64-bit register value.
   void movq(Register dst, const Operand& src);
   void movq(Register dst, Register src);
   // Sign extends immediate 32-bit value to 64 bits.
   void movq(Register dst, Immediate x);
   // Move the offset of the label location relative to the current
   // position (after the move) to the destination.
   void movl(const Operand& dst, Label* src);
+#ifdef V8_TARGET_ARCH_X32
+  void movl(Register dst, int32_t value, RelocInfo::Mode rmode);
+#endif
 
   // Move sign extended immediate to memory location.
   void movq(const Operand& dst, Immediate value);
   // Instructions to load a 64-bit immediate into a register.
   // All 64-bit immediates must have a relocation mode.
+  void movq(Register dst, int64_t value, RelocInfo::Mode rmode);
+#ifndef V8_TARGET_ARCH_X32
   void movq(Register dst, void* ptr, RelocInfo::Mode rmode);
-  void movq(Register dst, int64_t value, RelocInfo::Mode rmode);
   void movq(Register dst, const char* s, RelocInfo::Mode rmode);
   // Moves the address of the external reference into the register.
   void movq(Register dst, ExternalReference ext);
   void movq(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);
+#else
+  void movl(Register dst, void* ptr, RelocInfo::Mode rmode);
+  void movl(Register dst, const char* s, RelocInfo::Mode rmode);
+  void movl(Register dst, ExternalReference ext);
+  void movl(Register dst, Handle<Object> handle, RelocInfo::Mode rmode);
+#endif
 
   void movsxbq(Register dst, const Operand& src);
   void movsxwq(Register dst, const Operand& src);
   void movsxlq(Register dst, Register src);
   void movsxlq(Register dst, const Operand& src);
   void movzxbq(Register dst, const Operand& src);
   void movzxbl(Register dst, const Operand& src);
   void movzxwq(Register dst, const Operand& src);
   void movzxwl(Register dst, const Operand& src);
   void movzxwl(Register dst, Register src);
@@ skipping 10 matching lines @@
   void load_rax(ExternalReference ext);
 
   // Conditional moves.
   void cmovq(Condition cc, Register dst, Register src);
   void cmovq(Condition cc, Register dst, const Operand& src);
   void cmovl(Condition cc, Register dst, Register src);
   void cmovl(Condition cc, Register dst, const Operand& src);
 
   // Exchange two registers
   void xchg(Register dst, Register src);
+#ifdef V8_TARGET_ARCH_X32
+  void xchgl(Register dst, Register src);
+#endif
 
   // Arithmetics
   void addl(Register dst, Register src) {
     arithmetic_op_32(0x03, dst, src);
   }
 
   void addl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x0, dst, src);
   }
 
@@ skipping 214 matching lines @@
   }
 
   void orl(Register dst, const Operand& src) {
     arithmetic_op_32(0x0B, dst, src);
   }
 
   void or_(const Operand& dst, Register src) {
     arithmetic_op(0x09, src, dst);
   }
 
+#ifdef V8_TARGET_ARCH_X32
+  void orl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x09, src, dst);
+  }
+#endif
+
   void or_(Register dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
   void orl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x1, dst, src);
   }
 
   void or_(const Operand& dst, Immediate src) {
     immediate_arithmetic_op(0x1, dst, src);
   }
 
   void orl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x1, dst, src);
   }
 
-
   void rcl(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x2);
   }
 
   void rol(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x0);
   }
 
+#ifdef V8_TARGET_ARCH_X32
+  void roll(Register dst, Immediate imm8) {
+    shift_32(dst, imm8, 0x0);
+  }
+#endif
+
   void rcr(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x3);
   }
 
   void ror(Register dst, Immediate imm8) {
     shift(dst, imm8, 0x1);
   }
 
   void rorl(Register dst, Immediate imm8) {
     shift_32(dst, imm8, 0x1);
@@ skipping 87 matching lines @@
   }
 
   void subl(Register dst, Register src) {
     arithmetic_op_32(0x2B, dst, src);
   }
 
   void subl(Register dst, const Operand& src) {
     arithmetic_op_32(0x2B, dst, src);
   }
 
+#ifdef V8_TARGET_ARCH_X32
+  void subl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x29, src, dst);
+  }
+#endif
+
   void subl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x5, dst, src);
   }
 
   void subl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x5, dst, src);
   }
 
   void subb(Register dst, Immediate src) {
     immediate_arithmetic_op_8(0x5, dst, src);
   }
 
   void testb(Register dst, Register src);
   void testb(Register reg, Immediate mask);
   void testb(const Operand& op, Immediate mask);
   void testb(const Operand& op, Register reg);
   void testl(Register dst, Register src);
   void testl(Register reg, Immediate mask);
   void testl(const Operand& op, Immediate mask);
+#ifdef V8_TARGET_ARCH_X32
+  void testl(const Operand& op, Register reg);
+#endif
   void testq(const Operand& op, Register reg);
   void testq(Register dst, Register src);
   void testq(Register dst, Immediate mask);
 
   void xor_(Register dst, Register src) {
     if (dst.code() == src.code()) {
       arithmetic_op_32(0x33, dst, src);
     } else {
       arithmetic_op(0x33, dst, src);
     }
   }
 
   void xorl(Register dst, Register src) {
     arithmetic_op_32(0x33, dst, src);
   }
 
   void xorl(Register dst, const Operand& src) {
     arithmetic_op_32(0x33, dst, src);
   }
 
   void xorl(Register dst, Immediate src) {
     immediate_arithmetic_op_32(0x6, dst, src);
   }
 
+#ifdef V8_TARGET_ARCH_X32
+  void xorl(const Operand& dst, Register src) {
+    arithmetic_op_32(0x31, src, dst);
+  }
+#endif
+
   void xorl(const Operand& dst, Immediate src) {
     immediate_arithmetic_op_32(0x6, dst, src);
   }
 
   void xor_(Register dst, const Operand& src) {
     arithmetic_op(0x33, dst, src);
   }
 
   void xor_(const Operand& dst, Register src) {
     arithmetic_op(0x31, src, dst);
@@ skipping 220 matching lines @@
     kRoundToNearest = 0x0,
     kRoundDown      = 0x1,
     kRoundUp        = 0x2,
     kRoundToZero    = 0x3
   };
 
   void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);
 
   void movmskpd(Register dst, XMMRegister src);
   void movmskps(Register dst, XMMRegister src);
+#ifdef V8_TARGET_ARCH_X32
+  void pcmpeqd(XMMRegister dst, XMMRegister src);
+#endif
 
   // The first argument is the reg field, the second argument is the r/m field.
   void emit_sse_operand(XMMRegister dst, XMMRegister src);
   void emit_sse_operand(XMMRegister reg, const Operand& adr);
   void emit_sse_operand(XMMRegister dst, Register src);
   void emit_sse_operand(Register dst, XMMRegister src);
 
   // Debugging
   void Print();
 
@@ skipping 46 matching lines @@
   }
   void long_at_put(int pos, uint32_t x)  {
     *reinterpret_cast<uint32_t*>(addr_at(pos)) = x;
   }
 
   // code emission
   void GrowBuffer();
 
   void emit(byte x) { *pc_++ = x; }
   inline void emitl(uint32_t x);
+#ifdef V8_TARGET_ARCH_X32
+  inline void emitl(uint32_t x, RelocInfo::Mode rmode);
+#endif
   inline void emitq(uint64_t x, RelocInfo::Mode rmode);
   inline void emitw(uint16_t x);
   inline void emit_code_target(Handle<Code> target,
                                RelocInfo::Mode rmode,
                                TypeFeedbackId ast_id = TypeFeedbackId::None());
   inline void emit_runtime_entry(Address entry, RelocInfo::Mode rmode);
   void emit(Immediate x) { emitl(x.value_); }
 
   // Emits a REX prefix that encodes a 64-bit operand size and
   // the top bit of both register codes.
@@ skipping 194 matching lines @@
  private:
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 } }  // namespace v8::internal
 
 #endif  // V8_X64_ASSEMBLER_X64_H_