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Issue 180013002: Fix for failing asserts in HBoundsCheck code generation on x64: index register should be zero exten… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 9 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1452 data++; 1452 data++;
1453 break; 1453 break;
1454 case MOVE_REG_INSTR: { 1454 case MOVE_REG_INSTR: {
1455 byte* addr = NULL; 1455 byte* addr = NULL;
1456 switch (operand_size()) { 1456 switch (operand_size()) {
1457 case OPERAND_WORD_SIZE: 1457 case OPERAND_WORD_SIZE:
1458 addr = reinterpret_cast<byte*>(*reinterpret_cast<int16_t*>(data + 1)); 1458 addr = reinterpret_cast<byte*>(*reinterpret_cast<int16_t*>(data + 1));
1459 data += 3; 1459 data += 3;
1460 break; 1460 break;
1461 case OPERAND_DOUBLEWORD_SIZE: 1461 case OPERAND_DOUBLEWORD_SIZE:
1462 addr = reinterpret_cast<byte*>(*reinterpret_cast<int32_t*>(data + 1)); 1462 addr =
1463 reinterpret_cast<byte*>(*reinterpret_cast<uint32_t*>(data + 1));
1463 data += 5; 1464 data += 5;
1464 break; 1465 break;
1465 case OPERAND_QUADWORD_SIZE: 1466 case OPERAND_QUADWORD_SIZE:
1466 addr = reinterpret_cast<byte*>(*reinterpret_cast<int64_t*>(data + 1)); 1467 addr = reinterpret_cast<byte*>(*reinterpret_cast<int64_t*>(data + 1));
1467 data += 9; 1468 data += 9;
1468 break; 1469 break;
1469 default: 1470 default:
1470 UNREACHABLE(); 1471 UNREACHABLE();
1471 } 1472 }
1472 AppendToBuffer("mov%c %s,%s", 1473 AppendToBuffer("mov%c %s,%s",
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1927 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) { 1928 for (int i = 6 - static_cast<int>(pc - prev_pc); i >= 0; i--) {
1928 fprintf(f, " "); 1929 fprintf(f, " ");
1929 } 1930 }
1930 fprintf(f, " %s\n", buffer.start()); 1931 fprintf(f, " %s\n", buffer.start());
1931 } 1932 }
1932 } 1933 }
1933 1934
1934 } // namespace disasm 1935 } // namespace disasm
1935 1936
1936 #endif // V8_TARGET_ARCH_X64 1937 #endif // V8_TARGET_ARCH_X64
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