OLD | NEW |
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
(...skipping 1786 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1797 rx_form(A, r1, opnd.rx(), opnd.rb(), opnd.offset()); | 1797 rx_form(A, r1, opnd.rx(), opnd.rb(), opnd.offset()); |
1798 } | 1798 } |
1799 | 1799 |
1800 // Add Register-Storage (32) | 1800 // Add Register-Storage (32) |
1801 void Assembler::ay(Register r1, const MemOperand& opnd) { | 1801 void Assembler::ay(Register r1, const MemOperand& opnd) { |
1802 rxy_form(AY, r1, opnd.rx(), opnd.rb(), opnd.offset()); | 1802 rxy_form(AY, r1, opnd.rx(), opnd.rb(), opnd.offset()); |
1803 } | 1803 } |
1804 | 1804 |
1805 // Add Immediate (32) | 1805 // Add Immediate (32) |
1806 void Assembler::afi(Register r1, const Operand& opnd) { | 1806 void Assembler::afi(Register r1, const Operand& opnd) { |
1807 ril_form(ALFI, r1, opnd); | 1807 ril_form(AFI, r1, opnd); |
1808 } | 1808 } |
1809 | 1809 |
1810 // Add Halfword Register-Storage (32) | 1810 // Add Halfword Register-Storage (32) |
1811 void Assembler::ah(Register r1, const MemOperand& opnd) { | 1811 void Assembler::ah(Register r1, const MemOperand& opnd) { |
1812 rx_form(AH, r1, opnd.rx(), opnd.rb(), opnd.offset()); | 1812 rx_form(AH, r1, opnd.rx(), opnd.rb(), opnd.offset()); |
1813 } | 1813 } |
1814 | 1814 |
1815 // Add Halfword Register-Storage (32) | 1815 // Add Halfword Register-Storage (32) |
1816 void Assembler::ahy(Register r1, const MemOperand& opnd) { | 1816 void Assembler::ahy(Register r1, const MemOperand& opnd) { |
1817 rxy_form(AHY, r1, opnd.rx(), opnd.rb(), opnd.offset()); | 1817 rxy_form(AHY, r1, opnd.rx(), opnd.rb(), opnd.offset()); |
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1913 // ------------------------------- | 1913 // ------------------------------- |
1914 // 64-bit Add Logical Instructions | 1914 // 64-bit Add Logical Instructions |
1915 // ------------------------------- | 1915 // ------------------------------- |
1916 // Add Logical Register-Storage (64) | 1916 // Add Logical Register-Storage (64) |
1917 void Assembler::alg(Register r1, const MemOperand& opnd) { | 1917 void Assembler::alg(Register r1, const MemOperand& opnd) { |
1918 rxy_form(ALG, r1, opnd.rx(), opnd.rb(), opnd.offset()); | 1918 rxy_form(ALG, r1, opnd.rx(), opnd.rb(), opnd.offset()); |
1919 } | 1919 } |
1920 | 1920 |
1921 // Add Logical Immediate (64) | 1921 // Add Logical Immediate (64) |
1922 void Assembler::algfi(Register r1, const Operand& opnd) { | 1922 void Assembler::algfi(Register r1, const Operand& opnd) { |
1923 ril_form(ALFI, r1, opnd); | 1923 ril_form(ALGFI, r1, opnd); |
1924 } | 1924 } |
1925 | 1925 |
1926 // Add Logical Register-Register (64) | 1926 // Add Logical Register-Register (64) |
1927 void Assembler::algr(Register r1, Register r2) { rre_form(ALGR, r1, r2); } | 1927 void Assembler::algr(Register r1, Register r2) { rre_form(ALGR, r1, r2); } |
1928 | 1928 |
1929 // Add Logical Register-Register-Register (64) | 1929 // Add Logical Register-Register-Register (64) |
1930 void Assembler::algrk(Register r1, Register r2, Register r3) { | 1930 void Assembler::algrk(Register r1, Register r2, Register r3) { |
1931 rrf1_form(ALGRK, r1, r2, r3); | 1931 rrf1_form(ALGRK, r1, r2, r3); |
1932 } | 1932 } |
1933 | 1933 |
(...skipping 1091 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3025 | 3025 |
3026 reloc_info_writer.Write(&rinfo); | 3026 reloc_info_writer.Write(&rinfo); |
3027 } | 3027 } |
3028 | 3028 |
3029 reloc_info_writer.Finish(); | 3029 reloc_info_writer.Finish(); |
3030 } | 3030 } |
3031 | 3031 |
3032 } // namespace internal | 3032 } // namespace internal |
3033 } // namespace v8 | 3033 } // namespace v8 |
3034 #endif // V8_TARGET_ARCH_S390 | 3034 #endif // V8_TARGET_ARCH_S390 |
OLD | NEW |