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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 293 | 293 |
| 294 | 294 |
| 295 bool RelocInfo::IsCodedSpecially() { | 295 bool RelocInfo::IsCodedSpecially() { |
| 296 // The deserializer needs to know whether a pointer is specially coded. Being | 296 // The deserializer needs to know whether a pointer is specially coded. Being |
| 297 // specially coded on ARM means that it is a movw/movt instruction. We don't | 297 // specially coded on ARM means that it is a movw/movt instruction. We don't |
| 298 // generate those yet. | 298 // generate those yet. |
| 299 return false; | 299 return false; |
| 300 } | 300 } |
| 301 | 301 |
| 302 | 302 |
| 303 bool RelocInfo::IsInConstantPool() { |
| 304 return Assembler::IsLdrPcImmediateOffset(Memory::int32_at(pc_)); |
| 305 } |
| 306 |
| 307 |
| 303 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { | 308 void RelocInfo::PatchCode(byte* instructions, int instruction_count) { |
| 304 // Patch the code at the current address with the supplied instructions. | 309 // Patch the code at the current address with the supplied instructions. |
| 305 Instr* pc = reinterpret_cast<Instr*>(pc_); | 310 Instr* pc = reinterpret_cast<Instr*>(pc_); |
| 306 Instr* instr = reinterpret_cast<Instr*>(instructions); | 311 Instr* instr = reinterpret_cast<Instr*>(instructions); |
| 307 for (int i = 0; i < instruction_count; i++) { | 312 for (int i = 0; i < instruction_count; i++) { |
| 308 *(pc + i) = *(instr + i); | 313 *(pc + i) = *(instr + i); |
| 309 } | 314 } |
| 310 | 315 |
| 311 // Indicate that code has changed. | 316 // Indicate that code has changed. |
| 312 CPU::FlushICache(pc_, instruction_count * Assembler::kInstrSize); | 317 CPU::FlushICache(pc_, instruction_count * Assembler::kInstrSize); |
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| 3492 | 3497 |
| 3493 // Since a constant pool was just emitted, move the check offset forward by | 3498 // Since a constant pool was just emitted, move the check offset forward by |
| 3494 // the standard interval. | 3499 // the standard interval. |
| 3495 next_buffer_check_ = pc_offset() + kCheckPoolInterval; | 3500 next_buffer_check_ = pc_offset() + kCheckPoolInterval; |
| 3496 } | 3501 } |
| 3497 | 3502 |
| 3498 | 3503 |
| 3499 } } // namespace v8::internal | 3504 } } // namespace v8::internal |
| 3500 | 3505 |
| 3501 #endif // V8_TARGET_ARCH_ARM | 3506 #endif // V8_TARGET_ARCH_ARM |
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