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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
7 | 7 |
8 #if V8_TARGET_ARCH_PPC | 8 #if V8_TARGET_ARCH_PPC |
9 | 9 |
10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
(...skipping 842 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
853 orx(dst_high, dst_high, scratch); | 853 orx(dst_high, dst_high, scratch); |
854 slw(dst_low, src_low, shift); | 854 slw(dst_low, src_low, shift); |
855 bind(&done); | 855 bind(&done); |
856 } | 856 } |
857 | 857 |
858 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, | 858 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, |
859 Register src_low, Register src_high, | 859 Register src_low, Register src_high, |
860 uint32_t shift) { | 860 uint32_t shift) { |
861 DCHECK(!AreAliased(dst_low, src_high)); | 861 DCHECK(!AreAliased(dst_low, src_high)); |
862 DCHECK(!AreAliased(dst_high, src_low)); | 862 DCHECK(!AreAliased(dst_high, src_low)); |
863 if (shift >= 32) { | 863 if (shift == 32) { |
| 864 Move(dst_high, src_low); |
| 865 li(dst_low, Operand::Zero()); |
| 866 } else if (shift > 32) { |
864 shift &= 0x1f; | 867 shift &= 0x1f; |
865 slwi(dst_high, src_low, Operand(shift)); | 868 slwi(dst_high, src_low, Operand(shift)); |
866 li(dst_low, Operand::Zero()); | 869 li(dst_low, Operand::Zero()); |
867 } else if (shift == 0) { | 870 } else if (shift == 0) { |
868 Move(dst_low, src_low); | 871 Move(dst_low, src_low); |
869 Move(dst_high, src_high); | 872 Move(dst_high, src_high); |
870 } else { | 873 } else { |
871 slwi(dst_high, src_high, Operand(shift)); | 874 slwi(dst_high, src_high, Operand(shift)); |
872 rlwimi(dst_high, src_low, shift, 32 - shift, 31); | 875 rlwimi(dst_high, src_low, shift, 32 - shift, 31); |
873 slwi(dst_low, src_low, Operand(shift)); | 876 slwi(dst_low, src_low, Operand(shift)); |
(...skipping 22 matching lines...) Expand all Loading... |
896 orx(dst_low, dst_low, scratch); | 899 orx(dst_low, dst_low, scratch); |
897 srw(dst_high, src_high, shift); | 900 srw(dst_high, src_high, shift); |
898 bind(&done); | 901 bind(&done); |
899 } | 902 } |
900 | 903 |
901 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, | 904 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, |
902 Register src_low, Register src_high, | 905 Register src_low, Register src_high, |
903 uint32_t shift) { | 906 uint32_t shift) { |
904 DCHECK(!AreAliased(dst_low, src_high)); | 907 DCHECK(!AreAliased(dst_low, src_high)); |
905 DCHECK(!AreAliased(dst_high, src_low)); | 908 DCHECK(!AreAliased(dst_high, src_low)); |
906 if (shift >= 32) { | 909 if (shift == 32) { |
| 910 Move(dst_low, src_high); |
| 911 li(dst_high, Operand::Zero()); |
| 912 } else if (shift > 32) { |
907 shift &= 0x1f; | 913 shift &= 0x1f; |
908 srwi(dst_low, src_high, Operand(shift)); | 914 srwi(dst_low, src_high, Operand(shift)); |
909 li(dst_high, Operand::Zero()); | 915 li(dst_high, Operand::Zero()); |
910 } else if (shift == 0) { | 916 } else if (shift == 0) { |
911 Move(dst_low, src_low); | 917 Move(dst_low, src_low); |
912 Move(dst_high, src_high); | 918 Move(dst_high, src_high); |
913 } else { | 919 } else { |
914 srwi(dst_low, src_low, Operand(shift)); | 920 srwi(dst_low, src_low, Operand(shift)); |
915 rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1); | 921 rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1); |
916 srwi(dst_high, src_high, Operand(shift)); | 922 srwi(dst_high, src_high, Operand(shift)); |
(...skipping 22 matching lines...) Expand all Loading... |
939 orx(dst_low, dst_low, scratch); | 945 orx(dst_low, dst_low, scratch); |
940 sraw(dst_high, src_high, shift); | 946 sraw(dst_high, src_high, shift); |
941 bind(&done); | 947 bind(&done); |
942 } | 948 } |
943 | 949 |
944 void MacroAssembler::ShiftRightAlgPair(Register dst_low, Register dst_high, | 950 void MacroAssembler::ShiftRightAlgPair(Register dst_low, Register dst_high, |
945 Register src_low, Register src_high, | 951 Register src_low, Register src_high, |
946 uint32_t shift) { | 952 uint32_t shift) { |
947 DCHECK(!AreAliased(dst_low, src_high)); | 953 DCHECK(!AreAliased(dst_low, src_high)); |
948 DCHECK(!AreAliased(dst_high, src_low)); | 954 DCHECK(!AreAliased(dst_high, src_low)); |
949 if (shift >= 32) { | 955 if (shift == 32) { |
| 956 Move(dst_low, src_high); |
| 957 srawi(dst_high, src_high, 31); |
| 958 } else if (shift > 32) { |
950 shift &= 0x1f; | 959 shift &= 0x1f; |
951 srawi(dst_low, src_high, shift); | 960 srawi(dst_low, src_high, shift); |
952 srawi(dst_high, src_high, 31); | 961 srawi(dst_high, src_high, 31); |
953 } else if (shift == 0) { | 962 } else if (shift == 0) { |
954 Move(dst_low, src_low); | 963 Move(dst_low, src_low); |
955 Move(dst_high, src_high); | 964 Move(dst_high, src_high); |
956 } else { | 965 } else { |
957 srwi(dst_low, src_low, Operand(shift)); | 966 srwi(dst_low, src_low, Operand(shift)); |
958 rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1); | 967 rlwimi(dst_low, src_high, 32 - shift, 0, shift - 1); |
959 srawi(dst_high, src_high, shift); | 968 srawi(dst_high, src_high, shift); |
(...skipping 3661 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
4621 } | 4630 } |
4622 if (mag.shift > 0) srawi(result, result, mag.shift); | 4631 if (mag.shift > 0) srawi(result, result, mag.shift); |
4623 ExtractBit(r0, dividend, 31); | 4632 ExtractBit(r0, dividend, 31); |
4624 add(result, result, r0); | 4633 add(result, result, r0); |
4625 } | 4634 } |
4626 | 4635 |
4627 } // namespace internal | 4636 } // namespace internal |
4628 } // namespace v8 | 4637 } // namespace v8 |
4629 | 4638 |
4630 #endif // V8_TARGET_ARCH_PPC | 4639 #endif // V8_TARGET_ARCH_PPC |
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