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Issue 17907005: Implements external array access for mips. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM.
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 9
10 #include "lib/error.h" 10 #include "lib/error.h"
(...skipping 1175 matching lines...) Expand 10 before | Expand all | Expand 10 after
1186 } 1186 }
1187 return locs; 1187 return locs;
1188 } 1188 }
1189 1189
1190 1190
1191 void LoadIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 1191 void LoadIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
1192 Register array = locs()->in(0).reg(); 1192 Register array = locs()->in(0).reg();
1193 Location index = locs()->in(1); 1193 Location index = locs()->in(1);
1194 1194
1195 Address element_address(kNoRegister, 0); 1195 Address element_address(kNoRegister, 0);
1196 if (IsExternal()) { 1196 ASSERT(index.IsRegister()); // TODO(regis): Revisit.
1197 UNIMPLEMENTED(); 1197 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays
1198 } else { 1198 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the
1199 // index is expected to be untagged before accessing.
1200 ASSERT(kSmiTagShift == 1);
1201 switch (index_scale()) {
1202 case 1: {
1203 __ SmiUntag(index.reg());
1204 break;
1205 }
1206 case 2: {
1207 break;
1208 }
1209 case 4: {
1210 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 1));
1211 break;
1212 }
1213 case 8: {
1214 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 2));
1215 break;
1216 }
1217 case 16: {
1218 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 3));
1219 break;
1220 }
1221 default:
1222 UNREACHABLE();
1223 }
1224
1225 if (!IsExternal()) {
1199 ASSERT(this->array()->definition()->representation() == kTagged); 1226 ASSERT(this->array()->definition()->representation() == kTagged);
1200 ASSERT(index.IsRegister()); // TODO(regis): Revisit.
1201 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays
1202 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the
1203 // index is expected to be untagged before accessing.
1204 ASSERT(kSmiTagShift == 1);
1205 switch (index_scale()) {
1206 case 1: {
1207 __ SmiUntag(index.reg());
1208 break;
1209 }
1210 case 2: {
1211 break;
1212 }
1213 case 4: {
1214 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 1));
1215 break;
1216 }
1217 case 8: {
1218 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 2));
1219 break;
1220 }
1221 case 16: {
1222 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 3));
1223 break;
1224 }
1225 default:
1226 UNREACHABLE();
1227 }
1228 __ AddImmediate(index.reg(), 1227 __ AddImmediate(index.reg(),
1229 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag); 1228 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag);
1230 element_address = Address(array, index.reg(), LSL, 0);
1231 } 1229 }
1230 element_address = Address(array, index.reg(), LSL, 0);
1232 1231
1233 if ((representation() == kUnboxedDouble) || 1232 if ((representation() == kUnboxedDouble) ||
1234 (representation() == kUnboxedMint) || 1233 (representation() == kUnboxedMint) ||
1235 (representation() == kUnboxedFloat32x4)) { 1234 (representation() == kUnboxedFloat32x4)) {
1236 DRegister result = locs()->out().fpu_reg(); 1235 DRegister result = locs()->out().fpu_reg();
1237 switch (class_id()) { 1236 switch (class_id()) {
1238 case kTypedDataInt32ArrayCid: 1237 case kTypedDataInt32ArrayCid:
1239 UNIMPLEMENTED(); 1238 UNIMPLEMENTED();
1240 break; 1239 break;
1241 case kTypedDataUint32ArrayCid: 1240 case kTypedDataUint32ArrayCid:
(...skipping 142 matching lines...) Expand 10 before | Expand all | Expand 10 after
1384 } 1383 }
1385 return locs; 1384 return locs;
1386 } 1385 }
1387 1386
1388 1387
1389 void StoreIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) { 1388 void StoreIndexedInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
1390 Register array = locs()->in(0).reg(); 1389 Register array = locs()->in(0).reg();
1391 Location index = locs()->in(1); 1390 Location index = locs()->in(1);
1392 1391
1393 Address element_address(kNoRegister, 0); 1392 Address element_address(kNoRegister, 0);
1394 if (IsExternal()) { 1393 ASSERT(index.IsRegister()); // TODO(regis): Revisit.
1395 UNIMPLEMENTED(); 1394 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays
1396 } else { 1395 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the
1396 // index is expected to be untagged before accessing.
1397 ASSERT(kSmiTagShift == 1);
1398 switch (index_scale()) {
1399 case 1: {
1400 __ SmiUntag(index.reg());
1401 break;
1402 }
1403 case 2: {
1404 break;
1405 }
1406 case 4: {
1407 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 1));
1408 break;
1409 }
1410 case 8: {
1411 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 2));
1412 break;
1413 }
1414 case 16: {
1415 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 3));
1416 break;
1417 }
1418 default:
1419 UNREACHABLE();
1420 }
1421 if (!IsExternal()) {
1397 ASSERT(this->array()->definition()->representation() == kTagged); 1422 ASSERT(this->array()->definition()->representation() == kTagged);
1398 ASSERT(index.IsRegister()); // TODO(regis): Revisit.
1399 // Note that index is expected smi-tagged, (i.e, times 2) for all arrays
1400 // with index scale factor > 1. E.g., for Uint8Array and OneByteString the
1401 // index is expected to be untagged before accessing.
1402 ASSERT(kSmiTagShift == 1);
1403 switch (index_scale()) {
1404 case 1: {
1405 __ SmiUntag(index.reg());
1406 break;
1407 }
1408 case 2: {
1409 break;
1410 }
1411 case 4: {
1412 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 1));
1413 break;
1414 }
1415 case 8: {
1416 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 2));
1417 break;
1418 }
1419 case 16: {
1420 __ mov(index.reg(), ShifterOperand(index.reg(), LSL, 3));
1421 break;
1422 }
1423 default:
1424 UNREACHABLE();
1425 }
1426 __ AddImmediate(index.reg(), 1423 __ AddImmediate(index.reg(),
1427 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag); 1424 FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag);
1428 element_address = Address(array, index.reg(), LSL, 0);
1429 } 1425 }
1426 element_address = Address(array, index.reg(), LSL, 0);
1430 1427
1431 switch (class_id()) { 1428 switch (class_id()) {
1432 case kArrayCid: 1429 case kArrayCid:
1433 if (ShouldEmitStoreBarrier()) { 1430 if (ShouldEmitStoreBarrier()) {
1434 Register value = locs()->in(2).reg(); 1431 Register value = locs()->in(2).reg();
1435 __ StoreIntoObject(array, element_address, value); 1432 __ StoreIntoObject(array, element_address, value);
1436 } else if (locs()->in(2).IsConstant()) { 1433 } else if (locs()->in(2).IsConstant()) {
1437 const Object& constant = locs()->in(2).constant(); 1434 const Object& constant = locs()->in(2).constant();
1438 __ StoreIntoObjectNoBarrier(array, element_address, constant); 1435 __ StoreIntoObjectNoBarrier(array, element_address, constant);
1439 } else { 1436 } else {
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3627 compiler->GenerateCall(token_pos(), 3624 compiler->GenerateCall(token_pos(),
3628 &label, 3625 &label,
3629 PcDescriptors::kOther, 3626 PcDescriptors::kOther,
3630 locs()); 3627 locs());
3631 __ Drop(2); // Discard type arguments and receiver. 3628 __ Drop(2); // Discard type arguments and receiver.
3632 } 3629 }
3633 3630
3634 } // namespace dart 3631 } // namespace dart
3635 3632
3636 #endif // defined TARGET_ARCH_ARM 3633 #endif // defined TARGET_ARCH_ARM
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