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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <limits.h> | 5 #include <limits.h> |
| 6 #include <stdarg.h> | 6 #include <stdarg.h> |
| 7 #include <stdlib.h> | 7 #include <stdlib.h> |
| 8 #include <cmath> | 8 #include <cmath> |
| 9 | 9 |
| 10 #if V8_TARGET_ARCH_MIPS64 | 10 #if V8_TARGET_ARCH_MIPS64 |
| 11 | 11 |
| 12 #include "src/assembler.h" | 12 #include "src/assembler.h" |
| 13 #include "src/base/bits.h" | 13 #include "src/base/bits.h" |
| 14 #include "src/codegen.h" | 14 #include "src/codegen.h" |
| 15 #include "src/disasm.h" | 15 #include "src/disasm.h" |
| 16 #include "src/mips64/constants-mips64.h" | 16 #include "src/mips64/constants-mips64.h" |
| 17 #include "src/mips64/simulator-mips64.h" | 17 #include "src/mips64/simulator-mips64.h" |
| 18 #include "src/ostreams.h" | 18 #include "src/ostreams.h" |
| 19 #include "src/runtime/runtime-utils.h" | 19 #include "src/runtime/runtime-utils.h" |
| 20 | 20 |
| 21 // Only build the simulator if not compiling for real MIPS hardware. | 21 // Only build the simulator if not compiling for real MIPS hardware. |
| 22 #if defined(USE_SIMULATOR) | 22 #if defined(USE_SIMULATOR) |
| 23 | 23 |
| 24 namespace v8 { | 24 namespace v8 { |
| 25 namespace internal { | 25 namespace internal { |
| 26 | 26 |
| 27 // Utils functions. | 27 // Util functions. |
| 28 bool HaveSameSign(int64_t a, int64_t b) { | 28 inline bool HaveSameSign(int64_t a, int64_t b) { return ((a ^ b) >= 0); } |
| 29 return ((a ^ b) >= 0); | |
| 30 } | |
| 31 | |
| 32 | 29 |
| 33 uint32_t get_fcsr_condition_bit(uint32_t cc) { | 30 uint32_t get_fcsr_condition_bit(uint32_t cc) { |
| 34 if (cc == 0) { | 31 if (cc == 0) { |
| 35 return 23; | 32 return 23; |
| 36 } else { | 33 } else { |
| 37 return 24 + cc; | 34 return 24 + cc; |
| 38 } | 35 } |
| 39 } | 36 } |
| 40 | 37 |
| 41 | 38 |
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| 4322 break; | 4319 break; |
| 4323 case BC: | 4320 case BC: |
| 4324 BranchCompactHelper(true, 26); | 4321 BranchCompactHelper(true, 26); |
| 4325 break; | 4322 break; |
| 4326 case BALC: | 4323 case BALC: |
| 4327 BranchAndLinkCompactHelper(true, 26); | 4324 BranchAndLinkCompactHelper(true, 26); |
| 4328 break; | 4325 break; |
| 4329 case POP10: // BOVC, BEQZALC, BEQC / ADDI (pre-r6) | 4326 case POP10: // BOVC, BEQZALC, BEQC / ADDI (pre-r6) |
| 4330 if (kArchVariant == kMips64r6) { | 4327 if (kArchVariant == kMips64r6) { |
| 4331 if (rs_reg >= rt_reg) { // BOVC | 4328 if (rs_reg >= rt_reg) { // BOVC |
| 4332 if (HaveSameSign(rs, rt)) { | 4329 bool condition = !is_int32(rs) || !is_int32(rt) || !is_int32(rs + rt); |
| 4333 int64_t sum = rs + rt; | 4330 BranchCompactHelper(condition, 16); |
| 4334 BranchCompactHelper(sum < INT32_MIN || sum > INT32_MAX, 16); | |
| 4335 } | |
| 4336 } else { | 4331 } else { |
| 4337 if (rs_reg == 0) { // BEQZALC | 4332 if (rs_reg == 0) { // BEQZALC |
| 4338 BranchAndLinkCompactHelper(rt == 0, 16); | 4333 BranchAndLinkCompactHelper(rt == 0, 16); |
| 4339 } else { // BEQC | 4334 } else { // BEQC |
| 4340 BranchCompactHelper(rt == rs, 16); | 4335 BranchCompactHelper(rt == rs, 16); |
| 4341 } | 4336 } |
| 4342 } | 4337 } |
| 4343 } else { // ADDI | 4338 } else { // ADDI |
| 4344 if (HaveSameSign(rs, se_imm16)) { | 4339 if (HaveSameSign(rs, se_imm16)) { |
| 4345 if (rs > 0) { | 4340 if (rs > 0) { |
| 4346 if (rs <= Registers::kMaxValue - se_imm16) { | 4341 if (rs <= Registers::kMaxValue - se_imm16) { |
| 4347 SignalException(kIntegerOverflow); | 4342 SignalException(kIntegerOverflow); |
| 4348 } | 4343 } |
| 4349 } else if (rs < 0) { | 4344 } else if (rs < 0) { |
| 4350 if (rs >= Registers::kMinValue - se_imm16) { | 4345 if (rs >= Registers::kMinValue - se_imm16) { |
| 4351 SignalException(kIntegerUnderflow); | 4346 SignalException(kIntegerUnderflow); |
| 4352 } | 4347 } |
| 4353 } | 4348 } |
| 4354 } | 4349 } |
| 4355 SetResult(rt_reg, rs + se_imm16); | 4350 SetResult(rt_reg, rs + se_imm16); |
| 4356 } | 4351 } |
| 4357 break; | 4352 break; |
| 4358 case POP30: // BNVC, BNEZALC, BNEC / DADDI (pre-r6) | 4353 case POP30: // BNVC, BNEZALC, BNEC / DADDI (pre-r6) |
| 4359 if (kArchVariant == kMips64r6) { | 4354 if (kArchVariant == kMips64r6) { |
| 4360 if (rs_reg >= rt_reg) { // BNVC | 4355 if (rs_reg >= rt_reg) { // BNVC |
| 4361 if (!HaveSameSign(rs, rt) || rs == 0 || rt == 0) { | 4356 bool condition = is_int32(rs) && is_int32(rt) && is_int32(rs + rt); |
| 4362 BranchCompactHelper(true, 16); | 4357 BranchCompactHelper(condition, 16); |
| 4363 } else { | |
| 4364 int64_t sum = rs + rt; | |
| 4365 BranchCompactHelper(sum >= INT32_MIN && sum <= INT32_MAX, 16); | |
| 4366 } | |
| 4367 } else { | 4358 } else { |
| 4368 if (rs_reg == 0) { // BNEZALC | 4359 if (rs_reg == 0) { // BNEZALC |
| 4369 BranchAndLinkCompactHelper(rt != 0, 16); | 4360 BranchAndLinkCompactHelper(rt != 0, 16); |
| 4370 } else { // BNEC | 4361 } else { // BNEC |
| 4371 BranchCompactHelper(rt != rs, 16); | 4362 BranchCompactHelper(rt != rs, 16); |
| 4372 } | 4363 } |
| 4373 } | 4364 } |
| 4374 } | 4365 } |
| 4375 break; | 4366 break; |
| 4376 // ------------- Arithmetic instructions. | 4367 // ------------- Arithmetic instructions. |
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| 4855 } | 4846 } |
| 4856 | 4847 |
| 4857 | 4848 |
| 4858 #undef UNSUPPORTED | 4849 #undef UNSUPPORTED |
| 4859 } // namespace internal | 4850 } // namespace internal |
| 4860 } // namespace v8 | 4851 } // namespace v8 |
| 4861 | 4852 |
| 4862 #endif // USE_SIMULATOR | 4853 #endif // USE_SIMULATOR |
| 4863 | 4854 |
| 4864 #endif // V8_TARGET_ARCH_MIPS64 | 4855 #endif // V8_TARGET_ARCH_MIPS64 |
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