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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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5749 __ bind(&is_smi); | 5749 __ bind(&is_smi); |
5750 if (!input_reg.is(result_reg)) { | 5750 if (!input_reg.is(result_reg)) { |
5751 __ mov(result_reg, input_reg); | 5751 __ mov(result_reg, input_reg); |
5752 } | 5752 } |
5753 __ SmiUntag(result_reg); | 5753 __ SmiUntag(result_reg); |
5754 __ ClampUint8(result_reg); | 5754 __ ClampUint8(result_reg); |
5755 __ bind(&done); | 5755 __ bind(&done); |
5756 } | 5756 } |
5757 | 5757 |
5758 | 5758 |
| 5759 void LCodeGen::DoDoubleBits(LDoubleBits* instr) { |
| 5760 CpuFeatureScope scope(masm(), SSE2); |
| 5761 XMMRegister value_reg = ToDoubleRegister(instr->value()); |
| 5762 Register result_reg = ToRegister(instr->result()); |
| 5763 if (instr->hydrogen()->bits() == HDoubleBits::HIGH) { |
| 5764 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 5765 CpuFeatureScope scope2(masm(), SSE4_1); |
| 5766 __ pextrd(result_reg, value_reg, 1); |
| 5767 } else { |
| 5768 XMMRegister xmm_scratch = double_scratch0(); |
| 5769 __ pshufd(xmm_scratch, value_reg, 1); |
| 5770 __ movd(result_reg, xmm_scratch); |
| 5771 } |
| 5772 } else { |
| 5773 __ movd(result_reg, value_reg); |
| 5774 } |
| 5775 } |
| 5776 |
| 5777 |
| 5778 void LCodeGen::DoConstructDouble(LConstructDouble* instr) { |
| 5779 Register hi_reg = ToRegister(instr->hi()); |
| 5780 Register lo_reg = ToRegister(instr->lo()); |
| 5781 XMMRegister result_reg = ToDoubleRegister(instr->result()); |
| 5782 CpuFeatureScope scope(masm(), SSE2); |
| 5783 |
| 5784 if (CpuFeatures::IsSupported(SSE4_1)) { |
| 5785 CpuFeatureScope scope2(masm(), SSE4_1); |
| 5786 __ movd(result_reg, lo_reg); |
| 5787 __ pinsrd(result_reg, hi_reg, 1); |
| 5788 } else { |
| 5789 XMMRegister xmm_scratch = double_scratch0(); |
| 5790 __ movd(result_reg, hi_reg); |
| 5791 __ psllq(result_reg, 32); |
| 5792 __ movd(xmm_scratch, lo_reg); |
| 5793 __ orps(result_reg, xmm_scratch); |
| 5794 } |
| 5795 } |
| 5796 |
| 5797 |
5759 void LCodeGen::DoAllocate(LAllocate* instr) { | 5798 void LCodeGen::DoAllocate(LAllocate* instr) { |
5760 class DeferredAllocate V8_FINAL : public LDeferredCode { | 5799 class DeferredAllocate V8_FINAL : public LDeferredCode { |
5761 public: | 5800 public: |
5762 DeferredAllocate(LCodeGen* codegen, | 5801 DeferredAllocate(LCodeGen* codegen, |
5763 LAllocate* instr, | 5802 LAllocate* instr, |
5764 const X87Stack& x87_stack) | 5803 const X87Stack& x87_stack) |
5765 : LDeferredCode(codegen, x87_stack), instr_(instr) { } | 5804 : LDeferredCode(codegen, x87_stack), instr_(instr) { } |
5766 virtual void Generate() V8_OVERRIDE { | 5805 virtual void Generate() V8_OVERRIDE { |
5767 codegen()->DoDeferredAllocate(instr_); | 5806 codegen()->DoDeferredAllocate(instr_); |
5768 } | 5807 } |
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6283 FixedArray::kHeaderSize - kPointerSize)); | 6322 FixedArray::kHeaderSize - kPointerSize)); |
6284 __ bind(&done); | 6323 __ bind(&done); |
6285 } | 6324 } |
6286 | 6325 |
6287 | 6326 |
6288 #undef __ | 6327 #undef __ |
6289 | 6328 |
6290 } } // namespace v8::internal | 6329 } } // namespace v8::internal |
6291 | 6330 |
6292 #endif // V8_TARGET_ARCH_IA32 | 6331 #endif // V8_TARGET_ARCH_IA32 |
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