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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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411 #endif | 411 #endif |
412 | 412 |
413 | 413 |
414 enum CpuImplementer { | 414 enum CpuImplementer { |
415 UNKNOWN_IMPLEMENTER, | 415 UNKNOWN_IMPLEMENTER, |
416 ARM_IMPLEMENTER, | 416 ARM_IMPLEMENTER, |
417 QUALCOMM_IMPLEMENTER | 417 QUALCOMM_IMPLEMENTER |
418 }; | 418 }; |
419 | 419 |
420 | 420 |
| 421 enum CpuPart { |
| 422 CPU_UNKNOWN, |
| 423 CORTEX_A15, |
| 424 CORTEX_A12, |
| 425 CORTEX_A9, |
| 426 CORTEX_A8, |
| 427 CORTEX_A7, |
| 428 CORTEX_A5 |
| 429 }; |
| 430 |
| 431 |
421 // Feature flags bit positions. They are mostly based on the CPUID spec. | 432 // Feature flags bit positions. They are mostly based on the CPUID spec. |
422 // (We assign CPUID itself to one of the currently reserved bits -- | 433 // (We assign CPUID itself to one of the currently reserved bits -- |
423 // feel free to change this if needed.) | 434 // feel free to change this if needed.) |
424 // On X86/X64, values below 32 are bits in EDX, values above 32 are bits in ECX. | 435 // On X86/X64, values below 32 are bits in EDX, values above 32 are bits in ECX. |
425 enum CpuFeature { SSE4_1 = 32 + 19, // x86 | 436 enum CpuFeature { SSE4_1 = 32 + 19, // x86 |
426 SSE3 = 32 + 0, // x86 | 437 SSE3 = 32 + 0, // x86 |
427 SSE2 = 26, // x86 | 438 SSE2 = 26, // x86 |
428 CMOV = 15, // x86 | 439 CMOV = 15, // x86 |
429 RDTSC = 4, // x86 | 440 RDTSC = 4, // x86 |
430 CPUID = 10, // x86 | 441 CPUID = 10, // x86 |
431 VFP3 = 1, // ARM | 442 VFP3 = 1, // ARM |
432 ARMv7 = 2, // ARM | 443 ARMv7 = 2, // ARM |
433 SUDIV = 3, // ARM | 444 SUDIV = 3, // ARM |
434 UNALIGNED_ACCESSES = 4, // ARM | 445 UNALIGNED_ACCESSES = 4, // ARM |
435 MOVW_MOVT_IMMEDIATE_LOADS = 5, // ARM | 446 MOVW_MOVT_IMMEDIATE_LOADS = 5, // ARM |
436 VFP32DREGS = 6, // ARM | 447 VFP32DREGS = 6, // ARM |
| 448 NEON = 7, // ARM |
437 SAHF = 0, // x86 | 449 SAHF = 0, // x86 |
438 FPU = 1}; // MIPS | 450 FPU = 1}; // MIPS |
439 | 451 |
440 | 452 |
441 // Used to specify if a macro instruction must perform a smi check on tagged | 453 // Used to specify if a macro instruction must perform a smi check on tagged |
442 // values. | 454 // values. |
443 enum SmiCheckType { | 455 enum SmiCheckType { |
444 DONT_DO_SMI_CHECK, | 456 DONT_DO_SMI_CHECK, |
445 DO_SMI_CHECK | 457 DO_SMI_CHECK |
446 }; | 458 }; |
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568 | 580 |
569 enum ClearExceptionFlag { | 581 enum ClearExceptionFlag { |
570 KEEP_EXCEPTION, | 582 KEEP_EXCEPTION, |
571 CLEAR_EXCEPTION | 583 CLEAR_EXCEPTION |
572 }; | 584 }; |
573 | 585 |
574 | 586 |
575 } } // namespace v8::internal | 587 } } // namespace v8::internal |
576 | 588 |
577 #endif // V8_V8GLOBALS_H_ | 589 #endif // V8_V8GLOBALS_H_ |
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