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Issue 17846009: Better single stepping in VM debugger (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
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1571 { Label ok; 1571 { Label ok;
1572 // Check that the IC data array has NumberOfArgumentsChecked() == num_args. 1572 // Check that the IC data array has NumberOfArgumentsChecked() == num_args.
1573 // 'num_args_tested' is stored as an untagged int. 1573 // 'num_args_tested' is stored as an untagged int.
1574 __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset())); 1574 __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset()));
1575 __ BranchEqual(T0, num_args, &ok); 1575 __ BranchEqual(T0, num_args, &ok);
1576 __ Stop("Incorrect stub for IC data"); 1576 __ Stop("Incorrect stub for IC data");
1577 __ Bind(&ok); 1577 __ Bind(&ok);
1578 } 1578 }
1579 #endif // DEBUG 1579 #endif // DEBUG
1580 1580
1581
1582 // Check single stepping.
1583 Label not_stepping;
1584 __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
1585 __ lbu(T0, Address(T0, Isolate::single_step_offset()));
1586 __ BranchEqual(T0, 0, &not_stepping);
1587 // Call single step callback in debugger.
1588 __ addiu(SP, SP, Immediate(-2 * kWordSize));
1589 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data.
1590 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address.
1591 __ CallRuntime(kSingleStepHandlerRuntimeEntry);
1592 __ lw(RA, Address(SP, 0 * kWordSize));
1593 __ lw(S5, Address(SP, 1 * kWordSize));
1594 __ addiu(SP, SP, Immediate(2 * kWordSize));
1595 __ Bind(&not_stepping);
1596
1581 // Load argument descriptor into S4. 1597 // Load argument descriptor into S4.
1582 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); 1598 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset()));
1583 // Preserve return address, since RA is needed for subroutine call. 1599 // Preserve return address, since RA is needed for subroutine call.
1584 __ mov(T2, RA); 1600 __ mov(T2, RA);
1585 // Loop that checks if there is an IC data match. 1601 // Loop that checks if there is an IC data match.
1586 Label loop, update, test, found, get_class_id_as_smi; 1602 Label loop, update, test, found, get_class_id_as_smi;
1587 // S5: IC data object (preserved). 1603 // S5: IC data object (preserved).
1588 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); 1604 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
1589 // T0: ic_data_array with check entries: classes and target functions. 1605 // T0: ic_data_array with check entries: classes and target functions.
1590 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag); 1606 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
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1812 { Label ok; 1828 { Label ok;
1813 // Check that the IC data array has NumberOfArgumentsChecked() == 0. 1829 // Check that the IC data array has NumberOfArgumentsChecked() == 0.
1814 // 'num_args_tested' is stored as an untagged int. 1830 // 'num_args_tested' is stored as an untagged int.
1815 __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset())); 1831 __ lw(T0, FieldAddress(S5, ICData::num_args_tested_offset()));
1816 __ beq(T0, ZR, &ok); 1832 __ beq(T0, ZR, &ok);
1817 __ Stop("Incorrect IC data for unoptimized static call"); 1833 __ Stop("Incorrect IC data for unoptimized static call");
1818 __ Bind(&ok); 1834 __ Bind(&ok);
1819 } 1835 }
1820 #endif // DEBUG 1836 #endif // DEBUG
1821 1837
1838 // Check single stepping.
1839 Label not_stepping;
1840 __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
1841 __ lbu(T0, Address(T0, Isolate::single_step_offset()));
1842 __ BranchEqual(T0, 0, &not_stepping);
1843 // Call single step callback in debugger.
1844 __ addiu(SP, SP, Immediate(-2 * kWordSize));
1845 __ sw(S5, Address(SP, 1 * kWordSize)); // Preserve IC data.
1846 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address.
1847 __ CallRuntime(kSingleStepHandlerRuntimeEntry);
1848 __ lw(RA, Address(SP, 0 * kWordSize));
1849 __ lw(S5, Address(SP, 1 * kWordSize));
1850 __ addiu(SP, SP, Immediate(2 * kWordSize));
1851 __ Bind(&not_stepping);
1852
1853
1822 // S5: IC data object (preserved). 1854 // S5: IC data object (preserved).
1823 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset())); 1855 __ lw(T0, FieldAddress(S5, ICData::ic_data_offset()));
1824 // T0: ic_data_array with entries: target functions and count. 1856 // T0: ic_data_array with entries: target functions and count.
1825 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag); 1857 __ AddImmediate(T0, Array::data_offset() - kHeapObjectTag);
1826 // T0: points directly to the first ic data array element. 1858 // T0: points directly to the first ic data array element.
1827 const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize; 1859 const intptr_t target_offset = ICData::TargetIndexFor(0) * kWordSize;
1828 const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize; 1860 const intptr_t count_offset = ICData::CountIndexFor(0) * kWordSize;
1829 1861
1830 // Increment count for this call. 1862 // Increment count for this call.
1831 Label increment_done; 1863 Label increment_done;
(...skipping 473 matching lines...) Expand 10 before | Expand all | Expand 10 after
2305 } 2337 }
2306 2338
2307 2339
2308 // Called only from unoptimized code. All relevant registers have been saved. 2340 // Called only from unoptimized code. All relevant registers have been saved.
2309 // RA: return address. 2341 // RA: return address.
2310 // SP + 4: left operand. 2342 // SP + 4: left operand.
2311 // SP + 0: right operand. 2343 // SP + 0: right operand.
2312 // Returns: CMPRES is zero if equal, non-zero otherwise. 2344 // Returns: CMPRES is zero if equal, non-zero otherwise.
2313 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub( 2345 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub(
2314 Assembler* assembler) { 2346 Assembler* assembler) {
2347 // Check single stepping.
2348 Label not_stepping;
2349 __ lw(T0, FieldAddress(CTX, Context::isolate_offset()));
2350 __ lbu(T0, Address(T0, Isolate::single_step_offset()));
2351 __ BranchEqual(T0, 0, &not_stepping);
2352 // Call single step callback in debugger.
2353 __ addiu(SP, SP, Immediate(-1 * kWordSize));
2354 __ sw(RA, Address(SP, 0 * kWordSize)); // Return address.
2355 __ CallRuntime(kSingleStepHandlerRuntimeEntry);
2356 __ lw(RA, Address(SP, 0 * kWordSize));
2357 __ addiu(SP, SP, Immediate(1 * kWordSize));
2358 __ Bind(&not_stepping);
2359
2315 const Register temp1 = T2; 2360 const Register temp1 = T2;
2316 const Register temp2 = T3; 2361 const Register temp2 = T3;
2317 const Register left = T1; 2362 const Register left = T1;
2318 const Register right = T0; 2363 const Register right = T0;
2319 // Preserve left, right. 2364 // Preserve left, right.
2320 __ lw(left, Address(SP, 1 * kWordSize)); 2365 __ lw(left, Address(SP, 1 * kWordSize));
2321 __ lw(right, Address(SP, 0 * kWordSize)); 2366 __ lw(right, Address(SP, 0 * kWordSize));
2322 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); 2367 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2323 __ Ret(); 2368 __ Ret();
2324 } 2369 }
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2348 __ lw(left, Address(SP, 1 * kWordSize)); 2393 __ lw(left, Address(SP, 1 * kWordSize));
2349 __ lw(temp2, Address(SP, 2 * kWordSize)); 2394 __ lw(temp2, Address(SP, 2 * kWordSize));
2350 __ lw(temp1, Address(SP, 3 * kWordSize)); 2395 __ lw(temp1, Address(SP, 3 * kWordSize));
2351 __ Ret(); 2396 __ Ret();
2352 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize)); 2397 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
2353 } 2398 }
2354 2399
2355 } // namespace dart 2400 } // namespace dart
2356 2401
2357 #endif // defined TARGET_ARCH_MIPS 2402 #endif // defined TARGET_ARCH_MIPS
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