Subzero: Improve the use of timers.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 597 matching lines @@
              MemA->getOffset() == MemB->getOffset() &&
              MemA->getIndex() == MemB->getIndex() &&
              MemA->getShift() == MemB->getShift() &&
              MemA->getSegmentRegister() == MemB->getSegmentRegister();
     }
   }
   return false;
 }
 
 template <typename TraitsType> void TargetX86Base<TraitsType>::findRMW() {
+  TimerMarker _(TimerStack::TT_findRMW, Func);
   Func->dump("Before RMW");
   if (Func->isVerbose(IceV_RMW))
     Func->getContext()->lockStr();
   for (CfgNode *Node : Func->getNodes()) {
     // Walk through the instructions, considering each sequence of 3
     // instructions, and look for the particular RMW pattern. Note that this
     // search can be "broken" (false negatives) if there are intervening
     // deleted instructions, or intervening instructions that could be safely
     // moved out of the way to reveal an RMW pattern.
     auto E = Node->getInsts().end();
@@ skipping 97 matching lines @@
     return true;
   }
   if (Src0 != LoadDest && Src1 == LoadDest) {
     Src1 = LoadSrc;
     return true;
   }
   return false;
 }
 
 template <typename TraitsType> void TargetX86Base<TraitsType>::doLoadOpt() {
+  TimerMarker _(TimerStack::TT_loadOpt, Func);
   for (CfgNode *Node : Func->getNodes()) {
     Context.init(Node);
     while (!Context.atEnd()) {
       Variable *LoadDest = nullptr;
       Operand *LoadSrc = nullptr;
       Inst *CurInst = Context.getCur();
       Inst *Next = Context.getNextInst();
       // Determine whether the current instruction is a Load instruction or
       // equivalent.
       if (auto *Load = llvm::dyn_cast<InstLoad>(CurInst)) {
@@ skipping 6655 matching lines @@
         emitGlobal(*Var, SectionSuffix);
       }
     }
   } break;
   }
 }
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H