X87: [wasm] Int64Lowering of I64ShrU and I64ShrS on ia32.

src/x87/assembler-x87.cc

Index: src/x87/assembler-x87.cc
diff --git a/src/x87/assembler-x87.cc b/src/x87/assembler-x87.cc
index 506bad588a259b42a85b4d7589912f899304cad5..0fefc56d6c465e0a3305a49fa6ea06566b76f5db 100644
--- a/src/x87/assembler-x87.cc
+++ b/src/x87/assembler-x87.cc
@@ -939,7 +939,6 @@ void Assembler::sar_cl(const Operand& dst) {
   emit_operand(edi, dst);
 }
 
-
 void Assembler::sbb(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
   EMIT(0x1B);
@@ -983,15 +982,6 @@ void Assembler::shl_cl(const Operand& dst) {
   emit_operand(esp, dst);
 }
 
-
-void Assembler::shrd(Register dst, const Operand& src) {
-  EnsureSpace ensure_space(this);
-  EMIT(0x0F);
-  EMIT(0xAD);
-  emit_operand(dst, src);
-}
-
-
 void Assembler::shr(const Operand& dst, uint8_t imm8) {
   EnsureSpace ensure_space(this);
   DCHECK(is_uint5(imm8));  // illegal shift count
@@ -1012,6 +1002,21 @@ void Assembler::shr_cl(const Operand& dst) {
   emit_operand(ebp, dst);
 }
 
+void Assembler::shrd(Register dst, Register src, uint8_t shift) {
+  DCHECK(is_uint5(shift));
+  EnsureSpace ensure_space(this);
+  EMIT(0x0F);
+  EMIT(0xAC);
+  emit_operand(dst, Operand(src));
+  EMIT(shift);
+}
+
+void Assembler::shrd_cl(const Operand& dst, Register src) {
+  EnsureSpace ensure_space(this);
+  EMIT(0x0F);
+  EMIT(0xAD);
+  emit_operand(src, dst);
+}
 
 void Assembler::sub(const Operand& dst, const Immediate& x) {
   EnsureSpace ensure_space(this);