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Issue 178193026: Deoptimization fix for HPushArgument. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Remove dead code. Created 6 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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420 if (r.IsInteger32()) { 420 if (r.IsInteger32()) {
421 ASSERT(literal->IsNumber()); 421 ASSERT(literal->IsNumber());
422 __ mov(scratch, Operand(static_cast<int32_t>(literal->Number()))); 422 __ mov(scratch, Operand(static_cast<int32_t>(literal->Number())));
423 } else if (r.IsDouble()) { 423 } else if (r.IsDouble()) {
424 Abort(kEmitLoadRegisterUnsupportedDoubleImmediate); 424 Abort(kEmitLoadRegisterUnsupportedDoubleImmediate);
425 } else { 425 } else {
426 ASSERT(r.IsSmiOrTagged()); 426 ASSERT(r.IsSmiOrTagged());
427 __ Move(scratch, literal); 427 __ Move(scratch, literal);
428 } 428 }
429 return scratch; 429 return scratch;
430 } else if (op->IsStackSlot() || op->IsArgument()) { 430 } else if (op->IsStackSlot()) {
431 __ ldr(scratch, ToMemOperand(op)); 431 __ ldr(scratch, ToMemOperand(op));
432 return scratch; 432 return scratch;
433 } 433 }
434 UNREACHABLE(); 434 UNREACHABLE();
435 return scratch; 435 return scratch;
436 } 436 }
437 437
438 438
439 DwVfpRegister LCodeGen::ToDoubleRegister(LOperand* op) const { 439 DwVfpRegister LCodeGen::ToDoubleRegister(LOperand* op) const {
440 ASSERT(op->IsDoubleRegister()); 440 ASSERT(op->IsDoubleRegister());
(...skipping 15 matching lines...) Expand all
456 ASSERT(literal->IsNumber()); 456 ASSERT(literal->IsNumber());
457 __ mov(ip, Operand(static_cast<int32_t>(literal->Number()))); 457 __ mov(ip, Operand(static_cast<int32_t>(literal->Number())));
458 __ vmov(flt_scratch, ip); 458 __ vmov(flt_scratch, ip);
459 __ vcvt_f64_s32(dbl_scratch, flt_scratch); 459 __ vcvt_f64_s32(dbl_scratch, flt_scratch);
460 return dbl_scratch; 460 return dbl_scratch;
461 } else if (r.IsDouble()) { 461 } else if (r.IsDouble()) {
462 Abort(kUnsupportedDoubleImmediate); 462 Abort(kUnsupportedDoubleImmediate);
463 } else if (r.IsTagged()) { 463 } else if (r.IsTagged()) {
464 Abort(kUnsupportedTaggedImmediate); 464 Abort(kUnsupportedTaggedImmediate);
465 } 465 }
466 } else if (op->IsStackSlot() || op->IsArgument()) { 466 } else if (op->IsStackSlot()) {
467 // TODO(regis): Why is vldr not taking a MemOperand? 467 // TODO(regis): Why is vldr not taking a MemOperand?
468 // __ vldr(dbl_scratch, ToMemOperand(op)); 468 // __ vldr(dbl_scratch, ToMemOperand(op));
469 MemOperand mem_op = ToMemOperand(op); 469 MemOperand mem_op = ToMemOperand(op);
470 __ vldr(dbl_scratch, mem_op.rn(), mem_op.offset()); 470 __ vldr(dbl_scratch, mem_op.rn(), mem_op.offset());
471 return dbl_scratch; 471 return dbl_scratch;
472 } 472 }
473 UNREACHABLE(); 473 UNREACHABLE();
474 return dbl_scratch; 474 return dbl_scratch;
475 } 475 }
476 476
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676 if (op->IsStackSlot()) { 676 if (op->IsStackSlot()) {
677 if (is_tagged) { 677 if (is_tagged) {
678 translation->StoreStackSlot(op->index()); 678 translation->StoreStackSlot(op->index());
679 } else if (is_uint32) { 679 } else if (is_uint32) {
680 translation->StoreUint32StackSlot(op->index()); 680 translation->StoreUint32StackSlot(op->index());
681 } else { 681 } else {
682 translation->StoreInt32StackSlot(op->index()); 682 translation->StoreInt32StackSlot(op->index());
683 } 683 }
684 } else if (op->IsDoubleStackSlot()) { 684 } else if (op->IsDoubleStackSlot()) {
685 translation->StoreDoubleStackSlot(op->index()); 685 translation->StoreDoubleStackSlot(op->index());
686 } else if (op->IsArgument()) {
687 ASSERT(is_tagged);
688 int src_index = GetStackSlotCount() + op->index();
689 translation->StoreStackSlot(src_index);
690 } else if (op->IsRegister()) { 686 } else if (op->IsRegister()) {
691 Register reg = ToRegister(op); 687 Register reg = ToRegister(op);
692 if (is_tagged) { 688 if (is_tagged) {
693 translation->StoreRegister(reg); 689 translation->StoreRegister(reg);
694 } else if (is_uint32) { 690 } else if (is_uint32) {
695 translation->StoreUint32Register(reg); 691 translation->StoreUint32Register(reg);
696 } else { 692 } else {
697 translation->StoreInt32Register(reg); 693 translation->StoreInt32Register(reg);
698 } 694 }
699 } else if (op->IsDoubleRegister()) { 695 } else if (op->IsDoubleRegister()) {
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1662 1658
1663 1659
1664 void LCodeGen::DoBitI(LBitI* instr) { 1660 void LCodeGen::DoBitI(LBitI* instr) {
1665 LOperand* left_op = instr->left(); 1661 LOperand* left_op = instr->left();
1666 LOperand* right_op = instr->right(); 1662 LOperand* right_op = instr->right();
1667 ASSERT(left_op->IsRegister()); 1663 ASSERT(left_op->IsRegister());
1668 Register left = ToRegister(left_op); 1664 Register left = ToRegister(left_op);
1669 Register result = ToRegister(instr->result()); 1665 Register result = ToRegister(instr->result());
1670 Operand right(no_reg); 1666 Operand right(no_reg);
1671 1667
1672 if (right_op->IsStackSlot() || right_op->IsArgument()) { 1668 if (right_op->IsStackSlot()) {
1673 right = Operand(EmitLoadRegister(right_op, ip)); 1669 right = Operand(EmitLoadRegister(right_op, ip));
1674 } else { 1670 } else {
1675 ASSERT(right_op->IsRegister() || right_op->IsConstantOperand()); 1671 ASSERT(right_op->IsRegister() || right_op->IsConstantOperand());
1676 right = ToOperand(right_op); 1672 right = ToOperand(right_op);
1677 } 1673 }
1678 1674
1679 switch (instr->op()) { 1675 switch (instr->op()) {
1680 case Token::BIT_AND: 1676 case Token::BIT_AND:
1681 __ and_(result, left, right); 1677 __ and_(result, left, right);
1682 break; 1678 break;
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1785 } 1781 }
1786 1782
1787 1783
1788 void LCodeGen::DoSubI(LSubI* instr) { 1784 void LCodeGen::DoSubI(LSubI* instr) {
1789 LOperand* left = instr->left(); 1785 LOperand* left = instr->left();
1790 LOperand* right = instr->right(); 1786 LOperand* right = instr->right();
1791 LOperand* result = instr->result(); 1787 LOperand* result = instr->result();
1792 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow); 1788 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
1793 SBit set_cond = can_overflow ? SetCC : LeaveCC; 1789 SBit set_cond = can_overflow ? SetCC : LeaveCC;
1794 1790
1795 if (right->IsStackSlot() || right->IsArgument()) { 1791 if (right->IsStackSlot()) {
1796 Register right_reg = EmitLoadRegister(right, ip); 1792 Register right_reg = EmitLoadRegister(right, ip);
1797 __ sub(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond); 1793 __ sub(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond);
1798 } else { 1794 } else {
1799 ASSERT(right->IsRegister() || right->IsConstantOperand()); 1795 ASSERT(right->IsRegister() || right->IsConstantOperand());
1800 __ sub(ToRegister(result), ToRegister(left), ToOperand(right), set_cond); 1796 __ sub(ToRegister(result), ToRegister(left), ToOperand(right), set_cond);
1801 } 1797 }
1802 1798
1803 if (can_overflow) { 1799 if (can_overflow) {
1804 DeoptimizeIf(vs, instr->environment()); 1800 DeoptimizeIf(vs, instr->environment());
1805 } 1801 }
1806 } 1802 }
1807 1803
1808 1804
1809 void LCodeGen::DoRSubI(LRSubI* instr) { 1805 void LCodeGen::DoRSubI(LRSubI* instr) {
1810 LOperand* left = instr->left(); 1806 LOperand* left = instr->left();
1811 LOperand* right = instr->right(); 1807 LOperand* right = instr->right();
1812 LOperand* result = instr->result(); 1808 LOperand* result = instr->result();
1813 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow); 1809 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
1814 SBit set_cond = can_overflow ? SetCC : LeaveCC; 1810 SBit set_cond = can_overflow ? SetCC : LeaveCC;
1815 1811
1816 if (right->IsStackSlot() || right->IsArgument()) { 1812 if (right->IsStackSlot()) {
1817 Register right_reg = EmitLoadRegister(right, ip); 1813 Register right_reg = EmitLoadRegister(right, ip);
1818 __ rsb(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond); 1814 __ rsb(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond);
1819 } else { 1815 } else {
1820 ASSERT(right->IsRegister() || right->IsConstantOperand()); 1816 ASSERT(right->IsRegister() || right->IsConstantOperand());
1821 __ rsb(ToRegister(result), ToRegister(left), ToOperand(right), set_cond); 1817 __ rsb(ToRegister(result), ToRegister(left), ToOperand(right), set_cond);
1822 } 1818 }
1823 1819
1824 if (can_overflow) { 1820 if (can_overflow) {
1825 DeoptimizeIf(vs, instr->environment()); 1821 DeoptimizeIf(vs, instr->environment());
1826 } 1822 }
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1979 } 1975 }
1980 1976
1981 1977
1982 void LCodeGen::DoAddI(LAddI* instr) { 1978 void LCodeGen::DoAddI(LAddI* instr) {
1983 LOperand* left = instr->left(); 1979 LOperand* left = instr->left();
1984 LOperand* right = instr->right(); 1980 LOperand* right = instr->right();
1985 LOperand* result = instr->result(); 1981 LOperand* result = instr->result();
1986 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow); 1982 bool can_overflow = instr->hydrogen()->CheckFlag(HValue::kCanOverflow);
1987 SBit set_cond = can_overflow ? SetCC : LeaveCC; 1983 SBit set_cond = can_overflow ? SetCC : LeaveCC;
1988 1984
1989 if (right->IsStackSlot() || right->IsArgument()) { 1985 if (right->IsStackSlot()) {
1990 Register right_reg = EmitLoadRegister(right, ip); 1986 Register right_reg = EmitLoadRegister(right, ip);
1991 __ add(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond); 1987 __ add(ToRegister(result), ToRegister(left), Operand(right_reg), set_cond);
1992 } else { 1988 } else {
1993 ASSERT(right->IsRegister() || right->IsConstantOperand()); 1989 ASSERT(right->IsRegister() || right->IsConstantOperand());
1994 __ add(ToRegister(result), ToRegister(left), ToOperand(right), set_cond); 1990 __ add(ToRegister(result), ToRegister(left), ToOperand(right), set_cond);
1995 } 1991 }
1996 1992
1997 if (can_overflow) { 1993 if (can_overflow) {
1998 DeoptimizeIf(vs, instr->environment()); 1994 DeoptimizeIf(vs, instr->environment());
1999 } 1995 }
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5753 __ sub(scratch, result, Operand::PointerOffsetFromSmiKey(index)); 5749 __ sub(scratch, result, Operand::PointerOffsetFromSmiKey(index));
5754 __ ldr(result, FieldMemOperand(scratch, 5750 __ ldr(result, FieldMemOperand(scratch,
5755 FixedArray::kHeaderSize - kPointerSize)); 5751 FixedArray::kHeaderSize - kPointerSize));
5756 __ bind(&done); 5752 __ bind(&done);
5757 } 5753 }
5758 5754
5759 5755
5760 #undef __ 5756 #undef __
5761 5757
5762 } } // namespace v8::internal 5758 } } // namespace v8::internal
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