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Side by Side Diff: src/compiler/ppc/instruction-selector-ppc.cc

Issue 1780283002: PPC: [wasm] Int64Lowering of I64ShrU and I64ShrS. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 #include "src/ppc/frames-ppc.h" 9 #include "src/ppc/frames-ppc.h"
10 10
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716 Emit(kPPC_RotLeftAndMask32, g.DefineAsRegister(node), 716 Emit(kPPC_RotLeftAndMask32, g.DefineAsRegister(node),
717 g.UseRegister(mleft.left().node()), g.TempImmediate(sh), 717 g.UseRegister(mleft.left().node()), g.TempImmediate(sh),
718 g.TempImmediate(mb), g.TempImmediate(me)); 718 g.TempImmediate(mb), g.TempImmediate(me));
719 return; 719 return;
720 } 720 }
721 } 721 }
722 } 722 }
723 VisitRRO(this, kPPC_ShiftRight32, node, kShift32Imm); 723 VisitRRO(this, kPPC_ShiftRight32, node, kShift32Imm);
724 } 724 }
725 725
726 #if !V8_TARGET_ARCH_PPC64
727 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); }
728
729 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
730 #endif
731
732 #if V8_TARGET_ARCH_PPC64 726 #if V8_TARGET_ARCH_PPC64
733 void InstructionSelector::VisitWord64Shr(Node* node) { 727 void InstructionSelector::VisitWord64Shr(Node* node) {
734 PPCOperandGenerator g(this); 728 PPCOperandGenerator g(this);
735 Int64BinopMatcher m(node); 729 Int64BinopMatcher m(node);
736 if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) { 730 if (m.left().IsWord64And() && m.right().IsInRange(0, 63)) {
737 // Try to absorb logical-and into rldic 731 // Try to absorb logical-and into rldic
738 Int64BinopMatcher mleft(m.left().node()); 732 Int64BinopMatcher mleft(m.left().node());
739 int sh = m.right().Value(); 733 int sh = m.right().Value();
740 int mb; 734 int mb;
741 int me; 735 int me;
(...skipping 42 matching lines...) Expand 10 before | Expand all | Expand 10 after
784 } else if (mleft.right().Is(24) && m.right().Is(24)) { 778 } else if (mleft.right().Is(24) && m.right().Is(24)) {
785 Emit(kPPC_ExtendSignWord8, g.DefineAsRegister(node), 779 Emit(kPPC_ExtendSignWord8, g.DefineAsRegister(node),
786 g.UseRegister(mleft.left().node())); 780 g.UseRegister(mleft.left().node()));
787 return; 781 return;
788 } 782 }
789 } 783 }
790 VisitRRO(this, kPPC_ShiftRightAlg32, node, kShift32Imm); 784 VisitRRO(this, kPPC_ShiftRightAlg32, node, kShift32Imm);
791 } 785 }
792 786
793 #if !V8_TARGET_ARCH_PPC64 787 #if !V8_TARGET_ARCH_PPC64
794 void InstructionSelector::VisitWord32PairShl(Node* node) { 788 void VisitPairShift(InstructionSelector* selector, ArchOpcode opcode,
795 PPCOperandGenerator g(this); 789 Node* node) {
790 PPCOperandGenerator g(selector);
796 Int32Matcher m(node->InputAt(2)); 791 Int32Matcher m(node->InputAt(2));
797 InstructionOperand shift_operand; 792 InstructionOperand shift_operand;
798 if (m.HasValue()) { 793 if (m.HasValue()) {
799 shift_operand = g.UseImmediate(m.node()); 794 shift_operand = g.UseImmediate(m.node());
800 } else { 795 } else {
801 shift_operand = g.UseUniqueRegister(m.node()); 796 shift_operand = g.UseUniqueRegister(m.node());
802 } 797 }
803 798
804 InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0)), 799 InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0)),
805 g.UseRegister(node->InputAt(1)), 800 g.UseRegister(node->InputAt(1)),
806 shift_operand}; 801 shift_operand};
807 802
808 InstructionOperand outputs[] = { 803 InstructionOperand outputs[] = {
809 g.DefineSameAsFirst(node), 804 g.DefineSameAsFirst(node),
810 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; 805 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
811 806
812 Emit(kPPC_PairShiftLeft, 2, outputs, 3, inputs); 807 selector->Emit(opcode, 2, outputs, 3, inputs);
808 }
809
810 void InstructionSelector::VisitWord32PairShl(Node* node) {
811 VisitPairShift(this, kPPC_ShiftLeftPair, node);
812 }
813
814 void InstructionSelector::VisitWord32PairShr(Node* node) {
815 VisitPairShift(this, kPPC_ShiftRightPair, node);
816 }
817
818 void InstructionSelector::VisitWord32PairSar(Node* node) {
819 VisitPairShift(this, kPPC_ShiftRightAlgPair, node);
813 } 820 }
814 #endif 821 #endif
815 822
816 #if V8_TARGET_ARCH_PPC64 823 #if V8_TARGET_ARCH_PPC64
817 void InstructionSelector::VisitWord64Sar(Node* node) { 824 void InstructionSelector::VisitWord64Sar(Node* node) {
818 VisitRRO(this, kPPC_ShiftRightAlg64, node, kShift64Imm); 825 VisitRRO(this, kPPC_ShiftRightAlg64, node, kShift64Imm);
819 } 826 }
820 #endif 827 #endif
821 828
822 829
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1859 MachineOperatorBuilder::kFloat64RoundTruncate | 1866 MachineOperatorBuilder::kFloat64RoundTruncate |
1860 MachineOperatorBuilder::kFloat64RoundTiesAway | 1867 MachineOperatorBuilder::kFloat64RoundTiesAway |
1861 MachineOperatorBuilder::kWord32Popcnt | 1868 MachineOperatorBuilder::kWord32Popcnt |
1862 MachineOperatorBuilder::kWord64Popcnt; 1869 MachineOperatorBuilder::kWord64Popcnt;
1863 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f. 1870 // We omit kWord32ShiftIsSafe as s[rl]w use 0x3f as a mask rather than 0x1f.
1864 } 1871 }
1865 1872
1866 } // namespace compiler 1873 } // namespace compiler
1867 } // namespace internal 1874 } // namespace internal
1868 } // namespace v8 1875 } // namespace v8
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