PPC: [wasm] Int64Lowering of I64ShrU and I64ShrS.

src/compiler/ppc/instruction-codes-ppc.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
 #define V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 // PPC-specific opcodes that specify which assembly sequence to emit.
 // Most opcodes specify a single instruction.
 #define TARGET_ARCH_OPCODE_LIST(V) \
   V(PPC_And)                       \
   V(PPC_AndComplement)             \
   V(PPC_Or)                        \
   V(PPC_OrComplement)              \
   V(PPC_Xor)                       \
   V(PPC_ShiftLeft32)               \
   V(PPC_ShiftLeft64)               \
+  V(PPC_ShiftLeftPair)             \
   V(PPC_ShiftRight32)              \
   V(PPC_ShiftRight64)              \
+  V(PPC_ShiftRightPair)            \
   V(PPC_ShiftRightAlg32)           \
   V(PPC_ShiftRightAlg64)           \
-  V(PPC_PairShiftLeft)             \
+  V(PPC_ShiftRightAlgPair)         \
   V(PPC_RotRight32)                \
   V(PPC_RotRight64)                \
   V(PPC_Not)                       \
   V(PPC_RotLeftAndMask32)          \
   V(PPC_RotLeftAndClear64)         \
   V(PPC_RotLeftAndClearLeft64)     \
   V(PPC_RotLeftAndClearRight64)    \
   V(PPC_Add)                       \
   V(PPC_AddWithOverflow32)         \
   V(PPC_AddDouble)                 \
@@ skipping 95 matching lines @@
 // MRR = [register + register]
 #define TARGET_ADDRESSING_MODE_LIST(V) \
   V(MRI) /* [%r0 + K] */               \
   V(MRR) /* [%r0 + %r1] */
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_PPC_INSTRUCTION_CODES_PPC_H_