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Unified Diff: src/mips/macro-assembler-mips.h

Issue 1779713009: Implement optional turbofan UnalignedLoad and UnalignedStore operators (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix failures in cctest/test-run-wasm-64/Run_Wasm_LoadStoreI64_sx due to missing implementation of U… Created 4 years, 9 months ago
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Index: src/mips/macro-assembler-mips.h
diff --git a/src/mips/macro-assembler-mips.h b/src/mips/macro-assembler-mips.h
index 8913591dad0fed9b42f9c943b142622f320db45d..8fe38a3a820470bc257a2a1ea017775af63c7b3d 100644
--- a/src/mips/macro-assembler-mips.h
+++ b/src/mips/macro-assembler-mips.h
@@ -661,9 +661,19 @@ class MacroAssembler: public Assembler {
void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
+ void Ulh(Register rd, const MemOperand& rs);
+ void Ulhu(Register rd, const MemOperand& rs);
+ void Ush(Register rd, const MemOperand& rs, Register scratch);
+
void Ulw(Register rd, const MemOperand& rs);
void Usw(Register rd, const MemOperand& rs);
+ void Ulwc1(FPURegister fd, const MemOperand& rs, Register scratch);
+ void Uswc1(FPURegister fd, const MemOperand& rs, Register scratch);
+
+ void Uldc1(FPURegister fd, const MemOperand& rs, Register scratch);
+ void Usdc1(FPURegister fd, const MemOperand& rs, Register scratch);
+
// Load int32 in the rd register.
void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {

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