Implement optional turbofan UnalignedLoad and UnalignedStore operators

src/mips64/constants-mips64.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef  V8_MIPS_CONSTANTS_H_
 #define  V8_MIPS_CONSTANTS_H_
 
 #include "src/base/logging.h"
 #include "src/base/macros.h"
 #include "src/globals.h"
@@ skipping 42 matching lines @@
 const bool IsMipsSoftFloatABI = false;
 #elif(defined(__mips_soft_float) && __mips_soft_float != 0)
 // This flag is raised when -msoft-float is passed to the compiler.
 // Although FPU is a base requirement for v8, soft-float ABI is used
 // on soft-float systems with FPU kernel emulation.
 const bool IsMipsSoftFloatABI = true;
 #else
 const bool IsMipsSoftFloatABI = true;
 #endif
 
+#if defined(V8_TARGET_LITTLE_ENDIAN)
+const uint32_t kMipsLwrOffset = 0;
+const uint32_t kMipsLwlOffset = 3;
+const uint32_t kMipsSwrOffset = 0;
+const uint32_t kMipsSwlOffset = 3;
+const uint32_t kMipsLdrOffset = 0;
+const uint32_t kMipsLdlOffset = 7;
+const uint32_t kMipsSdrOffset = 0;
+const uint32_t kMipsSdlOffset = 7;
+#elif defined(V8_TARGET_BIG_ENDIAN)
+const uint32_t kMipsLwrOffset = 3;
+const uint32_t kMipsLwlOffset = 0;
+const uint32_t kMipsSwrOffset = 3;
+const uint32_t kMipsSwlOffset = 0;
+const uint32_t kMipsLdrOffset = 7;
+const uint32_t kMipsLdlOffset = 0;
+const uint32_t kMipsSdrOffset = 7;
+const uint32_t kMipsSdlOffset = 0;
+#else
+#error Unknown endianness
+#endif
 
 #ifndef __STDC_FORMAT_MACROS
 #define __STDC_FORMAT_MACROS
 #endif
 #include <inttypes.h>
 
 
 // Defines constants and accessor classes to assemble, disassemble and
 // simulate MIPS32 instructions.
 //
@@ skipping 831 matching lines @@
   // Instruction type.
   enum Type {
     kRegisterType,
     kImmediateType,
     kJumpType,
     kUnsupported = -1
   };
 
   enum TypeChecks { NORMAL, EXTRA };
 
-
   static constexpr uint64_t kOpcodeImmediateTypeMask =
       OpcodeToBitNumber(REGIMM) | OpcodeToBitNumber(BEQ) |
       OpcodeToBitNumber(BNE) | OpcodeToBitNumber(BLEZ) |
       OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
       OpcodeToBitNumber(DADDI) | OpcodeToBitNumber(ADDIU) |
       OpcodeToBitNumber(DADDIU) | OpcodeToBitNumber(SLTI) |
       OpcodeToBitNumber(SLTIU) | OpcodeToBitNumber(ANDI) |
       OpcodeToBitNumber(ORI) | OpcodeToBitNumber(XORI) |
       OpcodeToBitNumber(LUI) | OpcodeToBitNumber(BEQL) |
       OpcodeToBitNumber(BNEL) | OpcodeToBitNumber(BLEZL) |
       OpcodeToBitNumber(BGTZL) | OpcodeToBitNumber(POP66) |
       OpcodeToBitNumber(POP76) | OpcodeToBitNumber(LB) | OpcodeToBitNumber(LH) |
       OpcodeToBitNumber(LWL) | OpcodeToBitNumber(LW) | OpcodeToBitNumber(LWU) |
       OpcodeToBitNumber(LD) | OpcodeToBitNumber(LBU) | OpcodeToBitNumber(LHU) |
-      OpcodeToBitNumber(LWR) | OpcodeToBitNumber(SB) | OpcodeToBitNumber(SH) |
+      OpcodeToBitNumber(LDL) | OpcodeToBitNumber(LDR) | OpcodeToBitNumber(LWR) |
+      OpcodeToBitNumber(SDL) | OpcodeToBitNumber(SB) | OpcodeToBitNumber(SH) |
       OpcodeToBitNumber(SWL) | OpcodeToBitNumber(SW) | OpcodeToBitNumber(SD) |
-      OpcodeToBitNumber(SWR) | OpcodeToBitNumber(LWC1) |
-      OpcodeToBitNumber(LDC1) | OpcodeToBitNumber(SWC1) |
-      OpcodeToBitNumber(SDC1) | OpcodeToBitNumber(PCREL) |
-      OpcodeToBitNumber(DAUI) | OpcodeToBitNumber(BC) | OpcodeToBitNumber(BALC);
+      OpcodeToBitNumber(SWR) | OpcodeToBitNumber(SDR) |
+      OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
+      OpcodeToBitNumber(SWC1) | OpcodeToBitNumber(SDC1) |
+      OpcodeToBitNumber(PCREL) | OpcodeToBitNumber(DAUI) |
+      OpcodeToBitNumber(BC) | OpcodeToBitNumber(BALC);
 
 #define FunctionFieldToBitNumber(function) (1ULL << function)
 
   // On r6, DCLZ_R6 aliases to existing MFLO.
   static const uint64_t kFunctionFieldRegisterTypeMask =
       FunctionFieldToBitNumber(JR) | FunctionFieldToBitNumber(JALR) |
       FunctionFieldToBitNumber(BREAK) | FunctionFieldToBitNumber(SLL) |
       FunctionFieldToBitNumber(DSLL) | FunctionFieldToBitNumber(DSLL32) |
       FunctionFieldToBitNumber(SRL) | FunctionFieldToBitNumber(DSRL) |
       FunctionFieldToBitNumber(DSRL32) | FunctionFieldToBitNumber(SRA) |
@@ skipping 334 matching lines @@
   }
   return kUnsupported;
 }
 
 #undef OpcodeToBitNumber
 #undef FunctionFieldToBitNumber
 }  // namespace internal
 }  // namespace v8
 
 #endif    // #ifndef V8_MIPS_CONSTANTS_H_