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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 1779713009: Implement optional turbofan UnalignedLoad and UnalignedStore operators (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix review remarks Created 4 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
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426 if (g.CanBeImmediate(index, opcode)) { 426 if (g.CanBeImmediate(index, opcode)) {
427 Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), g.NoOutput(), 427 Emit(opcode | AddressingModeField::encode(kMode_Offset_RI), g.NoOutput(),
428 g.UseRegister(base), g.UseImmediate(index), g.UseRegister(value)); 428 g.UseRegister(base), g.UseImmediate(index), g.UseRegister(value));
429 } else { 429 } else {
430 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), g.NoOutput(), 430 Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), g.NoOutput(),
431 g.UseRegister(base), g.UseRegister(index), g.UseRegister(value)); 431 g.UseRegister(base), g.UseRegister(index), g.UseRegister(value));
432 } 432 }
433 } 433 }
434 } 434 }
435 435
436 // Architecture supports unaligned access, therefore VisitLoad is used instead
437 void InstructionSelector::VisitUnalignedLoad(Node* node) { UNREACHABLE(); }
438
439 // Architecture supports unaligned access, therefore VisitStore is used instead
440 void InstructionSelector::VisitUnalignedStore(Node* node) { UNREACHABLE(); }
436 441
437 void InstructionSelector::VisitCheckedLoad(Node* node) { 442 void InstructionSelector::VisitCheckedLoad(Node* node) {
438 CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op()); 443 CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op());
439 ArmOperandGenerator g(this); 444 ArmOperandGenerator g(this);
440 Node* const buffer = node->InputAt(0); 445 Node* const buffer = node->InputAt(0);
441 Node* const offset = node->InputAt(1); 446 Node* const offset = node->InputAt(1);
442 Node* const length = node->InputAt(2); 447 Node* const length = node->InputAt(2);
443 ArchOpcode opcode = kArchNop; 448 ArchOpcode opcode = kArchNop;
444 switch (load_rep.representation()) { 449 switch (load_rep.representation()) {
445 case MachineRepresentation::kWord8: 450 case MachineRepresentation::kWord8:
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1811 MachineOperatorBuilder::kFloat64RoundTiesAway | 1816 MachineOperatorBuilder::kFloat64RoundTiesAway |
1812 MachineOperatorBuilder::kFloat32RoundTiesEven | 1817 MachineOperatorBuilder::kFloat32RoundTiesEven |
1813 MachineOperatorBuilder::kFloat64RoundTiesEven; 1818 MachineOperatorBuilder::kFloat64RoundTiesEven;
1814 } 1819 }
1815 return flags; 1820 return flags;
1816 } 1821 }
1817 1822
1818 } // namespace compiler 1823 } // namespace compiler
1819 } // namespace internal 1824 } // namespace internal
1820 } // namespace v8 1825 } // namespace v8
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