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Unified Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 1778893005: [wasm] Int64Lowering of Int64Sub on ia32 and arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@wasm-add
Patch Set: Rebase. Created 4 years, 9 months ago
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Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 465e5209d33cb09441d8ab01ebe4cf7262a25ef3..2fa7b42d373c49674e240c31650b6c03c364355d 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -783,6 +783,22 @@ void InstructionSelector::VisitInt32PairAdd(Node* node) {
Emit(kArmAddPair, 2, outputs, 4, inputs);
}
+void InstructionSelector::VisitInt32PairSub(Node* node) {
+ ArmOperandGenerator g(this);
+
+ // We use UseUniqueRegister here to avoid register sharing with the output
+ // register.
+ InstructionOperand inputs[] = {
+ g.UseRegister(node->InputAt(0)), g.UseUniqueRegister(node->InputAt(1)),
+ g.UseRegister(node->InputAt(2)), g.UseUniqueRegister(node->InputAt(3))};
+
+ InstructionOperand outputs[] = {
+ g.DefineAsRegister(node),
+ g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
+
+ Emit(kArmSubPair, 2, outputs, 4, inputs);
+}
+
void InstructionSelector::VisitWord32PairShl(Node* node) {
ArmOperandGenerator g(this);
// We use g.UseUniqueRegister here for InputAt(0) to guarantee that there is
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