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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
6 | 6 |
7 #if V8_TARGET_ARCH_ARM | 7 #if V8_TARGET_ARCH_ARM |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/base/division-by-constant.h" | 10 #include "src/base/division-by-constant.h" |
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1140 shift &= 0x1f; | 1140 shift &= 0x1f; |
1141 lsl(dst_high, src_low, Operand(shift)); | 1141 lsl(dst_high, src_low, Operand(shift)); |
1142 mov(dst_low, Operand(0)); | 1142 mov(dst_low, Operand(0)); |
1143 } else { | 1143 } else { |
1144 lsl(dst_high, src_high, Operand(shift)); | 1144 lsl(dst_high, src_high, Operand(shift)); |
1145 orr(dst_high, dst_high, Operand(src_low, LSR, 32 - shift)); | 1145 orr(dst_high, dst_high, Operand(src_low, LSR, 32 - shift)); |
1146 lsl(dst_low, src_low, Operand(shift)); | 1146 lsl(dst_low, src_low, Operand(shift)); |
1147 } | 1147 } |
1148 } | 1148 } |
1149 | 1149 |
| 1150 void MacroAssembler::LsrPair(Register dst_low, Register dst_high, |
| 1151 Register src_low, Register src_high, |
| 1152 Register scratch, Register shift) { |
| 1153 DCHECK(!AreAliased(dst_low, src_high)); |
| 1154 DCHECK(!AreAliased(dst_low, shift)); |
| 1155 |
| 1156 Label less_than_32; |
| 1157 Label done; |
| 1158 rsb(scratch, shift, Operand(32), SetCC); |
| 1159 b(gt, &less_than_32); |
| 1160 // If shift >= 32 |
| 1161 and_(scratch, shift, Operand(0x1f)); |
| 1162 lsr(dst_low, src_high, Operand(scratch)); |
| 1163 mov(dst_high, Operand(0)); |
| 1164 jmp(&done); |
| 1165 bind(&less_than_32); |
| 1166 // If shift < 32 |
| 1167 |
| 1168 lsr(dst_low, src_low, Operand(shift)); |
| 1169 orr(dst_low, dst_low, Operand(src_high, LSL, scratch)); |
| 1170 lsr(dst_high, src_high, Operand(shift)); |
| 1171 bind(&done); |
| 1172 } |
| 1173 |
| 1174 void MacroAssembler::LsrPair(Register dst_low, Register dst_high, |
| 1175 Register src_low, Register src_high, |
| 1176 uint32_t shift) { |
| 1177 DCHECK(!AreAliased(dst_low, src_high)); |
| 1178 Label less_than_32; |
| 1179 Label done; |
| 1180 if (shift == 32) { |
| 1181 mov(dst_low, src_high); |
| 1182 mov(dst_high, Operand(0)); |
| 1183 } else if (shift > 32) { |
| 1184 shift &= 0x1f; |
| 1185 lsr(dst_low, src_high, Operand(shift)); |
| 1186 mov(dst_high, Operand(0)); |
| 1187 } else if (shift == 0) { |
| 1188 Move(dst_low, src_low); |
| 1189 Move(dst_high, src_high); |
| 1190 } else { |
| 1191 lsr(dst_low, src_low, Operand(shift)); |
| 1192 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift)); |
| 1193 lsr(dst_high, src_high, Operand(shift)); |
| 1194 } |
| 1195 } |
| 1196 |
| 1197 void MacroAssembler::AsrPair(Register dst_low, Register dst_high, |
| 1198 Register src_low, Register src_high, |
| 1199 Register scratch, Register shift) { |
| 1200 DCHECK(!AreAliased(dst_low, src_high)); |
| 1201 DCHECK(!AreAliased(dst_low, shift)); |
| 1202 |
| 1203 Label less_than_32; |
| 1204 Label done; |
| 1205 rsb(scratch, shift, Operand(32), SetCC); |
| 1206 b(gt, &less_than_32); |
| 1207 // If shift >= 32 |
| 1208 and_(scratch, shift, Operand(0x1f)); |
| 1209 asr(dst_low, src_high, Operand(scratch)); |
| 1210 asr(dst_high, src_high, Operand(31)); |
| 1211 jmp(&done); |
| 1212 bind(&less_than_32); |
| 1213 // If shift < 32 |
| 1214 lsr(dst_low, src_low, Operand(shift)); |
| 1215 orr(dst_low, dst_low, Operand(src_high, LSL, scratch)); |
| 1216 asr(dst_high, src_high, Operand(shift)); |
| 1217 bind(&done); |
| 1218 } |
| 1219 |
| 1220 void MacroAssembler::AsrPair(Register dst_low, Register dst_high, |
| 1221 Register src_low, Register src_high, |
| 1222 uint32_t shift) { |
| 1223 DCHECK(!AreAliased(dst_low, src_high)); |
| 1224 Label less_than_32; |
| 1225 Label done; |
| 1226 if (shift == 32) { |
| 1227 mov(dst_low, src_high); |
| 1228 asr(dst_high, src_high, Operand(31)); |
| 1229 } else if (shift > 32) { |
| 1230 shift &= 0x1f; |
| 1231 asr(dst_low, src_high, Operand(shift)); |
| 1232 asr(dst_high, src_high, Operand(31)); |
| 1233 } else if (shift == 0) { |
| 1234 Move(dst_low, src_low); |
| 1235 Move(dst_high, src_high); |
| 1236 } else { |
| 1237 lsr(dst_low, src_low, Operand(shift)); |
| 1238 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift)); |
| 1239 asr(dst_high, src_high, Operand(shift)); |
| 1240 } |
| 1241 } |
| 1242 |
1150 void MacroAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress( | 1243 void MacroAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress( |
1151 Register code_target_address) { | 1244 Register code_target_address) { |
1152 DCHECK(FLAG_enable_embedded_constant_pool); | 1245 DCHECK(FLAG_enable_embedded_constant_pool); |
1153 ldr(pp, MemOperand(code_target_address, | 1246 ldr(pp, MemOperand(code_target_address, |
1154 Code::kConstantPoolOffset - Code::kHeaderSize)); | 1247 Code::kConstantPoolOffset - Code::kHeaderSize)); |
1155 add(pp, pp, code_target_address); | 1248 add(pp, pp, code_target_address); |
1156 } | 1249 } |
1157 | 1250 |
1158 | 1251 |
1159 void MacroAssembler::LoadConstantPoolPointerRegister() { | 1252 void MacroAssembler::LoadConstantPoolPointerRegister() { |
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3838 } | 3931 } |
3839 } | 3932 } |
3840 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); | 3933 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); |
3841 add(result, result, Operand(dividend, LSR, 31)); | 3934 add(result, result, Operand(dividend, LSR, 31)); |
3842 } | 3935 } |
3843 | 3936 |
3844 } // namespace internal | 3937 } // namespace internal |
3845 } // namespace v8 | 3938 } // namespace v8 |
3846 | 3939 |
3847 #endif // V8_TARGET_ARCH_ARM | 3940 #endif // V8_TARGET_ARCH_ARM |
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