 Chromium Code Reviews
 Chromium Code Reviews Issue 1778893004:
  [wasm] Implementation of Word32PairShr and Word32PairSar on arm.  (Closed) 
  Base URL: https://chromium.googlesource.com/v8/v8.git@pair-shl-test
    
  
    Issue 1778893004:
  [wasm] Implementation of Word32PairShr and Word32PairSar on arm.  (Closed) 
  Base URL: https://chromium.googlesource.com/v8/v8.git@pair-shl-test| OLD | NEW | 
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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. | 
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be | 
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. | 
| 4 | 4 | 
| 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 
| 6 | 6 | 
| 7 #if V8_TARGET_ARCH_ARM | 7 #if V8_TARGET_ARCH_ARM | 
| 8 | 8 | 
| 9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" | 
| 10 #include "src/base/division-by-constant.h" | 10 #include "src/base/division-by-constant.h" | 
| (...skipping 1130 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 1141 shift &= 0x1f; | 1141 shift &= 0x1f; | 
| 1142 lsl(dst_high, src_low, Operand(shift)); | 1142 lsl(dst_high, src_low, Operand(shift)); | 
| 1143 mov(dst_low, Operand(0)); | 1143 mov(dst_low, Operand(0)); | 
| 1144 } else { | 1144 } else { | 
| 1145 lsl(dst_high, src_high, Operand(shift)); | 1145 lsl(dst_high, src_high, Operand(shift)); | 
| 1146 orr(dst_high, dst_high, Operand(src_low, LSR, 32 - shift)); | 1146 orr(dst_high, dst_high, Operand(src_low, LSR, 32 - shift)); | 
| 1147 lsl(dst_low, src_low, Operand(shift)); | 1147 lsl(dst_low, src_low, Operand(shift)); | 
| 1148 } | 1148 } | 
| 1149 } | 1149 } | 
| 1150 | 1150 | 
| 1151 void MacroAssembler::LsrPair(Register dst_low, Register dst_high, | |
| 1152 Register src_low, Register src_high, | |
| 1153 Register scratch, Register shift) { | |
| 1154 DCHECK(!AreAliased(dst_low, src_high)); | |
| 1155 DCHECK(!AreAliased(dst_low, shift)); | |
| 1156 | |
| 1157 Label less_than_32; | |
| 1158 Label done; | |
| 1159 rsb(scratch, shift, Operand(32), SetCC); | |
| 1160 b(gt, &less_than_32); | |
| 1161 // If shift >= 32 | |
| 1162 and_(scratch, shift, Operand(0x1f)); | |
| 1163 lsr(dst_low, src_high, Operand(scratch)); | |
| 1164 mov(dst_high, Operand(0)); | |
| 1165 jmp(&done); | |
| 1166 bind(&less_than_32); | |
| 1167 // If shift < 32 | |
| 1168 | |
| 
Rodolph Perfetta (ARM)
2016/03/11 15:00:42
nit: did you intended the blank line?
 | |
| 1169 lsr(dst_low, src_low, Operand(shift)); | |
| 1170 orr(dst_low, dst_low, Operand(src_high, LSL, scratch)); | |
| 1171 lsr(dst_high, src_high, Operand(shift)); | |
| 1172 bind(&done); | |
| 1173 } | |
| 1174 | |
| 1175 void MacroAssembler::LsrPair(Register dst_low, Register dst_high, | |
| 1176 Register src_low, Register src_high, | |
| 1177 uint32_t shift) { | |
| 1178 DCHECK(!AreAliased(dst_low, src_high)); | |
| 1179 Label less_than_32; | |
| 1180 Label done; | |
| 1181 if (shift == 32) { | |
| 1182 mov(dst_low, src_high); | |
| 1183 mov(dst_high, Operand(0)); | |
| 1184 } else if (shift > 32) { | |
| 1185 shift &= 0x1f; | |
| 1186 lsr(dst_low, src_high, Operand(shift)); | |
| 1187 mov(dst_high, Operand(0)); | |
| 1188 } else if (shift == 0) { | |
| 1189 Move(dst_low, src_low); | |
| 1190 Move(dst_high, src_high); | |
| 1191 } else { | |
| 1192 lsr(dst_low, src_low, Operand(shift)); | |
| 1193 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift)); | |
| 1194 lsr(dst_high, src_high, Operand(shift)); | |
| 1195 } | |
| 1196 } | |
| 1197 | |
| 1198 void MacroAssembler::AsrPair(Register dst_low, Register dst_high, | |
| 1199 Register src_low, Register src_high, | |
| 1200 Register scratch, Register shift) { | |
| 1201 DCHECK(!AreAliased(dst_low, src_high)); | |
| 1202 DCHECK(!AreAliased(dst_low, shift)); | |
| 1203 | |
| 1204 Label less_than_32; | |
| 1205 Label done; | |
| 1206 rsb(scratch, shift, Operand(32), SetCC); | |
| 1207 b(gt, &less_than_32); | |
| 1208 // If shift >= 32 | |
| 1209 and_(scratch, shift, Operand(0x1f)); | |
| 1210 asr(dst_low, src_high, Operand(scratch)); | |
| 1211 asr(dst_high, src_high, Operand(31)); | |
| 1212 jmp(&done); | |
| 1213 bind(&less_than_32); | |
| 1214 // If shift < 32 | |
| 1215 lsr(dst_low, src_low, Operand(shift)); | |
| 1216 orr(dst_low, dst_low, Operand(src_high, LSL, scratch)); | |
| 1217 asr(dst_high, src_high, Operand(shift)); | |
| 1218 bind(&done); | |
| 1219 } | |
| 1220 | |
| 1221 void MacroAssembler::AsrPair(Register dst_low, Register dst_high, | |
| 1222 Register src_low, Register src_high, | |
| 1223 uint32_t shift) { | |
| 1224 DCHECK(!AreAliased(dst_low, src_high)); | |
| 1225 Label less_than_32; | |
| 1226 Label done; | |
| 1227 if (shift == 32) { | |
| 1228 mov(dst_low, src_high); | |
| 1229 asr(dst_high, src_high, Operand(31)); | |
| 1230 } else if (shift > 32) { | |
| 1231 shift &= 0x1f; | |
| 1232 asr(dst_low, src_high, Operand(shift)); | |
| 1233 asr(dst_high, src_high, Operand(31)); | |
| 1234 } else if (shift == 0) { | |
| 1235 Move(dst_low, src_low); | |
| 1236 Move(dst_high, src_high); | |
| 1237 } else { | |
| 1238 lsr(dst_low, src_low, Operand(shift)); | |
| 1239 orr(dst_low, dst_low, Operand(src_high, LSL, 32 - shift)); | |
| 1240 asr(dst_high, src_high, Operand(shift)); | |
| 1241 } | |
| 1242 } | |
| 1243 | |
| 1151 void MacroAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress( | 1244 void MacroAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress( | 
| 1152 Register code_target_address) { | 1245 Register code_target_address) { | 
| 1153 DCHECK(FLAG_enable_embedded_constant_pool); | 1246 DCHECK(FLAG_enable_embedded_constant_pool); | 
| 1154 ldr(pp, MemOperand(code_target_address, | 1247 ldr(pp, MemOperand(code_target_address, | 
| 1155 Code::kConstantPoolOffset - Code::kHeaderSize)); | 1248 Code::kConstantPoolOffset - Code::kHeaderSize)); | 
| 1156 add(pp, pp, code_target_address); | 1249 add(pp, pp, code_target_address); | 
| 1157 } | 1250 } | 
| 1158 | 1251 | 
| 1159 | 1252 | 
| 1160 void MacroAssembler::LoadConstantPoolPointerRegister() { | 1253 void MacroAssembler::LoadConstantPoolPointerRegister() { | 
| (...skipping 2678 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 3839 } | 3932 } | 
| 3840 } | 3933 } | 
| 3841 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); | 3934 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); | 
| 3842 add(result, result, Operand(dividend, LSR, 31)); | 3935 add(result, result, Operand(dividend, LSR, 31)); | 
| 3843 } | 3936 } | 
| 3844 | 3937 | 
| 3845 } // namespace internal | 3938 } // namespace internal | 
| 3846 } // namespace v8 | 3939 } // namespace v8 | 
| 3847 | 3940 | 
| 3848 #endif // V8_TARGET_ARCH_ARM | 3941 #endif // V8_TARGET_ARCH_ARM | 
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