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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 1778493004: [wasm] Int64Lowering of Int64Add on ia32 and arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: rebase Created 4 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/base/bits.h" 6 #include "src/base/bits.h"
7 #include "src/compiler/instruction-selector-impl.h" 7 #include "src/compiler/instruction-selector-impl.h"
8 #include "src/compiler/node-matchers.h" 8 #include "src/compiler/node-matchers.h"
9 #include "src/compiler/node-properties.h" 9 #include "src/compiler/node-properties.h"
10 10
(...skipping 749 matching lines...) Expand 10 before | Expand all | Expand 10 after
760 Emit(kArmSbfx, g.DefineAsRegister(node), 760 Emit(kArmSbfx, g.DefineAsRegister(node),
761 g.UseRegister(mleft.left().node()), g.TempImmediate(sar - shl), 761 g.UseRegister(mleft.left().node()), g.TempImmediate(sar - shl),
762 g.TempImmediate(32 - sar)); 762 g.TempImmediate(32 - sar));
763 return; 763 return;
764 } 764 }
765 } 765 }
766 } 766 }
767 VisitShift(this, node, TryMatchASR); 767 VisitShift(this, node, TryMatchASR);
768 } 768 }
769 769
770 void InstructionSelector::VisitInt32PairAdd(Node* node) {
771 ArmOperandGenerator g(this);
772
773 // We use UseUniqueRegister here to avoid register sharing with the output
774 // registers.
775 InstructionOperand inputs[] = {
776 g.UseRegister(node->InputAt(0)), g.UseUniqueRegister(node->InputAt(1)),
777 g.UseRegister(node->InputAt(2)), g.UseUniqueRegister(node->InputAt(3))};
778
779 InstructionOperand outputs[] = {
780 g.DefineAsRegister(node),
781 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
782
783 Emit(kArmAddPair, 2, outputs, 4, inputs);
784 }
785
770 void InstructionSelector::VisitWord32PairShl(Node* node) { 786 void InstructionSelector::VisitWord32PairShl(Node* node) {
771 ArmOperandGenerator g(this); 787 ArmOperandGenerator g(this);
772 Int32Matcher m(node->InputAt(2)); 788 Int32Matcher m(node->InputAt(2));
773 InstructionOperand shift_operand; 789 InstructionOperand shift_operand;
774 if (m.HasValue()) { 790 if (m.HasValue()) {
775 shift_operand = g.UseImmediate(m.node()); 791 shift_operand = g.UseImmediate(m.node());
776 } else { 792 } else {
777 shift_operand = g.UseUniqueRegister(m.node()); 793 shift_operand = g.UseUniqueRegister(m.node());
778 } 794 }
779 795
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1735 MachineOperatorBuilder::kFloat64RoundTiesAway | 1751 MachineOperatorBuilder::kFloat64RoundTiesAway |
1736 MachineOperatorBuilder::kFloat32RoundTiesEven | 1752 MachineOperatorBuilder::kFloat32RoundTiesEven |
1737 MachineOperatorBuilder::kFloat64RoundTiesEven; 1753 MachineOperatorBuilder::kFloat64RoundTiesEven;
1738 } 1754 }
1739 return flags; 1755 return flags;
1740 } 1756 }
1741 1757
1742 } // namespace compiler 1758 } // namespace compiler
1743 } // namespace internal 1759 } // namespace internal
1744 } // namespace v8 1760 } // namespace v8
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