| Index: test/NaCl/PNaClABI/intrinsics.ll
|
| diff --git a/test/NaCl/PNaClABI/intrinsics.ll b/test/NaCl/PNaClABI/intrinsics.ll
|
| index 1c28cfd967ecffad255c6ab8becf3dccab3dc4d9..95ce0724d0848a9800aa502fec98bb33f6abf72a 100644
|
| --- a/test/NaCl/PNaClABI/intrinsics.ll
|
| +++ b/test/NaCl/PNaClABI/intrinsics.ll
|
| @@ -25,6 +25,24 @@ declare void @llvm.memset.p0i8.i32(i8* %dest, i8 %val,
|
|
|
| declare i8* @llvm.nacl.read.tp()
|
|
|
| +declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)
|
| +declare i16 @llvm.nacl.atomic.load.i16(i16*, i32)
|
| +declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)
|
| +declare i64 @llvm.nacl.atomic.load.i64(i64*, i32)
|
| +declare void @llvm.nacl.atomic.store.i8(i8, i8*, i32)
|
| +declare void @llvm.nacl.atomic.store.i16(i16, i16*, i32)
|
| +declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)
|
| +declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32)
|
| +declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
|
| +declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
|
| +declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
|
| +declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
|
| +declare i8 @llvm.nacl.atomic.cmpxchg.i8(i8*, i8, i8, i32, i32)
|
| +declare i16 @llvm.nacl.atomic.cmpxchg.i16(i16*, i16, i16, i32, i32)
|
| +declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
|
| +declare i64 @llvm.nacl.atomic.cmpxchg.i64(i64*, i64, i64, i32, i32)
|
| +declare void @llvm.nacl.atomic.fence(i32)
|
| +
|
| declare i16 @llvm.bswap.i16(i16)
|
| declare i32 @llvm.bswap.i32(i32)
|
| declare i64 @llvm.bswap.i64(i64)
|
|
|