| Index: test/NaCl/PNaClABI/intrinsics.ll
|
| diff --git a/test/NaCl/PNaClABI/intrinsics.ll b/test/NaCl/PNaClABI/intrinsics.ll
|
| index 66113061abbc6990c09f86d21f13b56fe49633ee..7db61a9b5062d713c00b9a2aff696e2c2e26ec49 100644
|
| --- a/test/NaCl/PNaClABI/intrinsics.ll
|
| +++ b/test/NaCl/PNaClABI/intrinsics.ll
|
| @@ -25,6 +25,41 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* %dest, i8* %src,
|
| ; CHECK-NOT: Function llvm.nacl.read.tp is a disallowed LLVM intrinsic
|
| declare i8* @llvm.nacl.read.tp()
|
|
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.load.i8 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.load.i16 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.load.i32 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.load.i64 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.store.i8 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.store.i16 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.store.i32 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.store.i64 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.rmw.i8 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.rmw.i16 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.rmw.i32 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.rmw.i64 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.cmpxchg.i8 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.cmpxchg.i16 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.cmpxchg.i32 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.cmpxchg.i64 is a disallowed LLVM intrinsic
|
| +; CHECK-NOT: Function llvm.nacl.atomic.llvm.nacl.atomic.fence is a disallowed LLVM intrinsic
|
| +declare i8 @llvm.nacl.atomic.load.i8(i8*, i32)
|
| +declare i16 @llvm.nacl.atomic.load.i16(i16*, i32)
|
| +declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)
|
| +declare i64 @llvm.nacl.atomic.load.i64(i64*, i32)
|
| +declare void @llvm.nacl.atomic.store.i8(i8, i8*, i32)
|
| +declare void @llvm.nacl.atomic.store.i16(i16, i16*, i32)
|
| +declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)
|
| +declare void @llvm.nacl.atomic.store.i64(i64, i64*, i32)
|
| +declare i8 @llvm.nacl.atomic.rmw.i8(i32, i8*, i8, i32)
|
| +declare i16 @llvm.nacl.atomic.rmw.i16(i32, i16*, i16, i32)
|
| +declare i32 @llvm.nacl.atomic.rmw.i32(i32, i32*, i32, i32)
|
| +declare i64 @llvm.nacl.atomic.rmw.i64(i32, i64*, i64, i32)
|
| +declare i8 @llvm.nacl.atomic.cmpxchg.i8(i8*, i8, i8, i32, i32)
|
| +declare i16 @llvm.nacl.atomic.cmpxchg.i16(i16*, i16, i16, i32, i32)
|
| +declare i32 @llvm.nacl.atomic.cmpxchg.i32(i32*, i32, i32, i32, i32)
|
| +declare i64 @llvm.nacl.atomic.cmpxchg.i64(i64*, i64, i64, i32, i32)
|
| +declare void @llvm.nacl.atomic.fence(i32)
|
| +
|
| ; CHECK-NOT: Function llvm.bswap.i16 is a disallowed LLVM intrinsic
|
| declare i16 @llvm.bswap.i16(i16)
|
|
|
|
|