Concurrency support for PNaCl ABI

include/llvm/IR/Intrinsics.td

 //===- Intrinsics.td - Defines all LLVM intrinsics ---------*- tablegen -*-===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines properties of all LLVM intrinsics.
@@ skipping 480 matching lines @@
 def int_nacl_tp_tls_offset : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>,
                              GCCBuiltin<"__builtin_nacl_tp_tls_offset">;
 def int_nacl_tp_tdb_offset : Intrinsic<[llvm_i32_ty], [llvm_i32_ty]>,
                              GCCBuiltin<"__builtin_nacl_tp_tdb_offset">;
 
 // The following intrinsic provides a target-specific constant value to
 // indicate the target platform compiled to.  The enum values are enumerated
 // pnaclintrin.h.
 def int_nacl_target_arch : Intrinsic<[llvm_i32_ty], []>,
                             GCCBuiltin<"__builtin_nacl_target_arch">;
+
+// Atomic intrinsics.
+//
+// Volatiles and atomics are encoded through these intrinsics to make
+// them platform-independent, remove some of LLVM's legacy, and isolate
+// PNaCl from future changes to IR. The intrinsics allow user code to
+// use `__sync_*` builtins as well as C11/C++11 atomics.
+//
+// These are further documented in docs/PNaClLangRef.rst.
+//
+// Note that IntrReadWriteArgMem is used it all cases to prevent

[Derek Schuff, 2013/07/02 22:13:17]

s/it/in

[JF, 2013/07/02 23:14:54]

Done.

+// reordering.
+def int_nacl_atomic_load : Intrinsic<[llvm_anyint_ty],
+    [LLVMPointerType<LLVMMatchType<0>>, llvm_i32_ty],

[Mark Seaborn, 2013/07/02 19:16:02]

Can you comment the argument meanings here, please?

[JF, 2013/07/02 23:14:54]

The comment above says "These are further documented in docs/PNaClLangRef.rst."
I'd rather not replicate the exact same comment in two places.

+    [IntrReadWriteArgMem]>;
+def int_nacl_atomic_store : Intrinsic<[],
+    [llvm_anyint_ty, LLVMPointerType<LLVMMatchType<0>>, llvm_i32_ty],
+    [IntrReadWriteArgMem]>;
+def int_nacl_atomic_rmw : Intrinsic<[llvm_anyint_ty],
+    [llvm_i32_ty, LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>,
+    llvm_i32_ty],

[Mark Seaborn, 2013/07/02 19:16:02]

Indent by 1 more space since this is inside a list

[JF, 2013/07/02 23:14:54]

Done, and below.

+    [IntrReadWriteArgMem]>;
+def int_nacl_atomic_cmpxchg : Intrinsic<[llvm_anyint_ty],
+    [LLVMPointerType<LLVMMatchType<0>>, LLVMMatchType<0>, LLVMMatchType<0>,
+    llvm_i32_ty, llvm_i32_ty],
+    [IntrReadWriteArgMem]>;
+def int_nacl_atomic_fence : Intrinsic<[], [llvm_i32_ty],
+    [IntrReadWriteArgMem]>;
 // @LOCALMOD-END
 
 //===----------------------------------------------------------------------===//
 // Target-specific intrinsics
 //===----------------------------------------------------------------------===//
 
 include "llvm/IR/IntrinsicsPowerPC.td"
 include "llvm/IR/IntrinsicsX86.td"
 include "llvm/IR/IntrinsicsARM.td"
 include "llvm/IR/IntrinsicsXCore.td"
 include "llvm/IR/IntrinsicsHexagon.td"
 include "llvm/IR/IntrinsicsNVVM.td"
 include "llvm/IR/IntrinsicsMips.td"
 include "llvm/IR/IntrinsicsR600.td"