Chromium Code Reviews| OLD | NEW |
|---|---|
| 1 ; RUN: pnacl-abicheck < %s | FileCheck %s | 1 ; RUN: pnacl-abicheck < %s | FileCheck %s |
| 2 ; Test instruction opcodes allowed by PNaCl ABI | 2 ; Test instruction opcodes allowed by PNaCl ABI |
| 3 | 3 |
| 4 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:32" | 4 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:32" |
| 5 target triple = "le32-unknown-nacl" | 5 target triple = "le32-unknown-nacl" |
| 6 | 6 |
| 7 define void @terminators() { | 7 define void @terminators() { |
| 8 ; Terminator instructions | 8 ; Terminator instructions |
| 9 terminators: | 9 terminators: |
| 10 ret void | 10 ret void |
| (...skipping 57 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 68 | 68 |
| 69 ret void | 69 ret void |
| 70 } | 70 } |
| 71 | 71 |
| 72 define void @memory() { | 72 define void @memory() { |
| 73 ; Memory operations | 73 ; Memory operations |
| 74 %a1 = alloca i8, i32 4 | 74 %a1 = alloca i8, i32 4 |
| 75 %ptr = inttoptr i32 0 to i32* | 75 %ptr = inttoptr i32 0 to i32* |
| 76 %a2 = load i32* %ptr, align 1 | 76 %a2 = load i32* %ptr, align 1 |
| 77 store i32 undef, i32* %ptr, align 1 | 77 store i32 undef, i32* %ptr, align 1 |
| 78 ; CHECK: disallowed: atomic: {{.*}} load atomic | |
|
Mark Seaborn
2013/06/26 14:33:41
For readability, can you put all these atomic case
JF
2013/06/26 15:52:29
Done.
| |
| 79 %a3 = load atomic i32* %ptr seq_cst, align 4 | |
| 80 ; CHECK: disallowed: volatile: {{.*}} load volatile | |
| 81 %a4 = load volatile i32* %ptr, align 4 | |
| 82 ; CHECK: disallowed: atomic: store atomic | |
| 83 store atomic i32 undef, i32* %ptr seq_cst, align 4 | |
| 84 ; CHECK: disallowed: volatile: store volatile | |
| 85 store volatile i32 undef, i32* %ptr, align 4 | |
| 86 ; CHECK: disallowed: bad instruction opcode: fence | |
| 78 fence acq_rel | 87 fence acq_rel |
| 79 %a3 = cmpxchg i32* %ptr, i32 undef, i32 undef acq_rel | 88 ; CHECK: disallowed: bad instruction opcode: {{.*}} cmpxchg |
| 80 %a4 = atomicrmw add i32* %ptr, i32 1 acquire | 89 %a5 = cmpxchg i32* %ptr, i32 undef, i32 undef acq_rel |
| 90 ; CHECK: disallowed: bad instruction opcode: {{.*}} atomicrmw | |
| 91 %a6 = atomicrmw add i32* %ptr, i32 1 acquire | |
| 81 ; CHECK-NOT: disallowed | 92 ; CHECK-NOT: disallowed |
| 82 ; CHECK: disallowed: bad instruction opcode: {{.*}} getelementptr | 93 ; CHECK: disallowed: bad instruction opcode: {{.*}} getelementptr |
| 83 %a5 = getelementptr { i32, i32}* undef | 94 %a7 = getelementptr { i32, i32}* undef |
| 84 ret void | 95 ret void |
| 85 } | 96 } |
| 86 | 97 |
| 87 define void @conversion() { | 98 define void @conversion() { |
| 88 ; Conversion operations | 99 ; Conversion operations |
| 89 %a1 = trunc i32 undef to i8 | 100 %a1 = trunc i32 undef to i8 |
| 90 %a2 = zext i8 undef to i32 | 101 %a2 = zext i8 undef to i32 |
| 91 %a3 = sext i8 undef to i32 | 102 %a3 = sext i8 undef to i32 |
| 92 %a4 = fptrunc double undef to float | 103 %a4 = fptrunc double undef to float |
| 93 %a5 = fpext float undef to double | 104 %a5 = fpext float undef to double |
| (...skipping 60 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 154 | 165 |
| 155 define void @inline_asm() { | 166 define void @inline_asm() { |
| 156 call void asm "foo", ""() | 167 call void asm "foo", ""() |
| 157 ret void | 168 ret void |
| 158 } | 169 } |
| 159 ; CHECK-NOT: disallowed | 170 ; CHECK-NOT: disallowed |
| 160 ; CHECK: disallowed: inline assembly: call void asm "foo", ""() | 171 ; CHECK: disallowed: inline assembly: call void asm "foo", ""() |
| 161 | 172 |
| 162 ; CHECK-NOT: disallowed | 173 ; CHECK-NOT: disallowed |
| 163 ; If another check is added, there should be a check-not in between each check | 174 ; If another check is added, there should be a check-not in between each check |
| OLD | NEW |