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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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776 void srlv(Register rd, Register rt, Register rs); | 776 void srlv(Register rd, Register rt, Register rs); |
777 void sra(Register rt, Register rd, uint16_t sa); | 777 void sra(Register rt, Register rd, uint16_t sa); |
778 void srav(Register rt, Register rd, Register rs); | 778 void srav(Register rt, Register rd, Register rs); |
779 void rotr(Register rd, Register rt, uint16_t sa); | 779 void rotr(Register rd, Register rt, uint16_t sa); |
780 void rotrv(Register rd, Register rt, Register rs); | 780 void rotrv(Register rd, Register rt, Register rs); |
781 void dsll(Register rd, Register rt, uint16_t sa); | 781 void dsll(Register rd, Register rt, uint16_t sa); |
782 void dsllv(Register rd, Register rt, Register rs); | 782 void dsllv(Register rd, Register rt, Register rs); |
783 void dsrl(Register rd, Register rt, uint16_t sa); | 783 void dsrl(Register rd, Register rt, uint16_t sa); |
784 void dsrlv(Register rd, Register rt, Register rs); | 784 void dsrlv(Register rd, Register rt, Register rs); |
785 void drotr(Register rd, Register rt, uint16_t sa); | 785 void drotr(Register rd, Register rt, uint16_t sa); |
| 786 void drotr32(Register rd, Register rt, uint16_t sa); |
786 void drotrv(Register rd, Register rt, Register rs); | 787 void drotrv(Register rd, Register rt, Register rs); |
787 void dsra(Register rt, Register rd, uint16_t sa); | 788 void dsra(Register rt, Register rd, uint16_t sa); |
788 void dsrav(Register rd, Register rt, Register rs); | 789 void dsrav(Register rd, Register rt, Register rs); |
789 void dsll32(Register rt, Register rd, uint16_t sa); | 790 void dsll32(Register rt, Register rd, uint16_t sa); |
790 void dsrl32(Register rt, Register rd, uint16_t sa); | 791 void dsrl32(Register rt, Register rd, uint16_t sa); |
791 void dsra32(Register rt, Register rd, uint16_t sa); | 792 void dsra32(Register rt, Register rd, uint16_t sa); |
792 | 793 |
793 // Address computing instructions with shift. | 794 // Address computing instructions with shift. |
794 void lsa(Register rd, Register rt, Register rs, uint8_t sa); | 795 void lsa(Register rd, Register rt, Register rs, uint8_t sa); |
795 void dlsa(Register rd, Register rt, Register rs, uint8_t sa); | 796 void dlsa(Register rd, Register rt, Register rs, uint8_t sa); |
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1502 public: | 1503 public: |
1503 explicit EnsureSpace(Assembler* assembler) { | 1504 explicit EnsureSpace(Assembler* assembler) { |
1504 assembler->CheckBuffer(); | 1505 assembler->CheckBuffer(); |
1505 } | 1506 } |
1506 }; | 1507 }; |
1507 | 1508 |
1508 } // namespace internal | 1509 } // namespace internal |
1509 } // namespace v8 | 1510 } // namespace v8 |
1510 | 1511 |
1511 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 1512 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
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