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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
| 6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
| 7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
| 8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
| 9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
| 10 | 10 |
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| 778 | 778 |
| 779 InstructionOperand outputs[] = { | 779 InstructionOperand outputs[] = { |
| 780 g.DefineAsRegister(node), | 780 g.DefineAsRegister(node), |
| 781 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; | 781 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; |
| 782 | 782 |
| 783 Emit(kArmAddPair, 2, outputs, 4, inputs); | 783 Emit(kArmAddPair, 2, outputs, 4, inputs); |
| 784 } | 784 } |
| 785 | 785 |
| 786 void InstructionSelector::VisitWord32PairShl(Node* node) { | 786 void InstructionSelector::VisitWord32PairShl(Node* node) { |
| 787 ArmOperandGenerator g(this); | 787 ArmOperandGenerator g(this); |
| 788 // We use g.UseUniqueRegister here for InputAt(0) to guarantee that there is |
| 789 // no register aliasing with output registers. |
| 788 Int32Matcher m(node->InputAt(2)); | 790 Int32Matcher m(node->InputAt(2)); |
| 789 InstructionOperand shift_operand; | 791 InstructionOperand shift_operand; |
| 790 if (m.HasValue()) { | 792 if (m.HasValue()) { |
| 791 shift_operand = g.UseImmediate(m.node()); | 793 shift_operand = g.UseImmediate(m.node()); |
| 792 } else { | 794 } else { |
| 793 shift_operand = g.UseUniqueRegister(m.node()); | 795 shift_operand = g.UseUniqueRegister(m.node()); |
| 794 } | 796 } |
| 795 | 797 |
| 796 InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0)), | 798 InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)), |
| 797 g.UseRegister(node->InputAt(1)), | 799 g.UseRegister(node->InputAt(1)), |
| 798 shift_operand}; | 800 shift_operand}; |
| 799 | 801 |
| 800 InstructionOperand outputs[] = { | 802 InstructionOperand outputs[] = { |
| 801 g.DefineSameAsFirst(node), | 803 g.DefineAsRegister(node), |
| 802 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; | 804 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; |
| 803 | 805 |
| 804 Emit(kArmPairLsl, 2, outputs, 3, inputs); | 806 Emit(kArmLslPair, 2, outputs, 3, inputs); |
| 805 } | 807 } |
| 806 | 808 |
| 807 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); } | 809 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); } |
| 808 | 810 |
| 809 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); } | 811 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); } |
| 810 | 812 |
| 811 void InstructionSelector::VisitWord32Ror(Node* node) { | 813 void InstructionSelector::VisitWord32Ror(Node* node) { |
| 812 VisitShift(this, node, TryMatchROR); | 814 VisitShift(this, node, TryMatchROR); |
| 813 } | 815 } |
| 814 | 816 |
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| 1751 MachineOperatorBuilder::kFloat64RoundTiesAway | | 1753 MachineOperatorBuilder::kFloat64RoundTiesAway | |
| 1752 MachineOperatorBuilder::kFloat32RoundTiesEven | | 1754 MachineOperatorBuilder::kFloat32RoundTiesEven | |
| 1753 MachineOperatorBuilder::kFloat64RoundTiesEven; | 1755 MachineOperatorBuilder::kFloat64RoundTiesEven; |
| 1754 } | 1756 } |
| 1755 return flags; | 1757 return flags; |
| 1756 } | 1758 } |
| 1757 | 1759 |
| 1758 } // namespace compiler | 1760 } // namespace compiler |
| 1759 } // namespace internal | 1761 } // namespace internal |
| 1760 } // namespace v8 | 1762 } // namespace v8 |
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