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Side by Side Diff: src/compiler/arm/code-generator-arm.cc

Issue 1776393004: [wasm] Fixed register allocation for Word32PairShl on arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@wasm-add
Patch Set: Created 4 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm/macro-assembler-arm.h" 7 #include "src/arm/macro-assembler-arm.h"
8 #include "src/ast/scopes.h" 8 #include "src/ast/scopes.h"
9 #include "src/compiler/code-generator-impl.h" 9 #include "src/compiler/code-generator-impl.h"
10 #include "src/compiler/gap-resolver.h" 10 #include "src/compiler/gap-resolver.h"
(...skipping 774 matching lines...) Expand 10 before | Expand all | Expand 10 after
785 // i.InputRegister(1) ... left high word. 785 // i.InputRegister(1) ... left high word.
786 // i.InputRegister(2) ... right low word. 786 // i.InputRegister(2) ... right low word.
787 // i.InputRegister(3) ... right high word. 787 // i.InputRegister(3) ... right high word.
788 __ add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(2), 788 __ add(i.TempRegister(0), i.InputRegister(0), i.InputRegister(2),
789 SBit::SetCC); 789 SBit::SetCC);
790 __ adc(i.OutputRegister(1), i.InputRegister(1), 790 __ adc(i.OutputRegister(1), i.InputRegister(1),
791 Operand(i.InputRegister(3))); 791 Operand(i.InputRegister(3)));
792 __ Move(i.OutputRegister(0), i.TempRegister(0)); 792 __ Move(i.OutputRegister(0), i.TempRegister(0));
793 DCHECK_EQ(LeaveCC, i.OutputSBit()); 793 DCHECK_EQ(LeaveCC, i.OutputSBit());
794 break; 794 break;
795 case kArmPairLsl: 795 case kArmLslPair:
796 if (instr->InputAt(2)->IsImmediate()) { 796 if (instr->InputAt(2)->IsImmediate()) {
797 __ PairLsl(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 797 __ LslPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
798 i.InputRegister(1), i.InputInt32(2)); 798 i.InputRegister(1), i.InputInt32(2));
799 } else { 799 } else {
800 __ PairLsl(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0), 800 __ LslPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
801 i.InputRegister(1), kScratchReg, i.InputRegister(2)); 801 i.InputRegister(1), kScratchReg, i.InputRegister(2));
802 } 802 }
803 break; 803 break;
804 case kArmVcmpF32: 804 case kArmVcmpF32:
805 if (instr->InputAt(1)->IsDoubleRegister()) { 805 if (instr->InputAt(1)->IsDoubleRegister()) {
806 __ VFPCompareAndSetFlags(i.InputFloat32Register(0), 806 __ VFPCompareAndSetFlags(i.InputFloat32Register(0),
807 i.InputFloat32Register(1)); 807 i.InputFloat32Register(1));
808 } else { 808 } else {
809 DCHECK(instr->InputAt(1)->IsImmediate()); 809 DCHECK(instr->InputAt(1)->IsImmediate());
810 // 0.0 is the only immediate supported by vcmp instructions. 810 // 0.0 is the only immediate supported by vcmp instructions.
(...skipping 721 matching lines...) Expand 10 before | Expand all | Expand 10 after
1532 padding_size -= v8::internal::Assembler::kInstrSize; 1532 padding_size -= v8::internal::Assembler::kInstrSize;
1533 } 1533 }
1534 } 1534 }
1535 } 1535 }
1536 1536
1537 #undef __ 1537 #undef __
1538 1538
1539 } // namespace compiler 1539 } // namespace compiler
1540 } // namespace internal 1540 } // namespace internal
1541 } // namespace v8 1541 } // namespace v8
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