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1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// | 1 //===- subzero/src/IceRegAlloc.h - Linear-scan reg. allocation --*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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36 void scan(const SmallBitVector &RegMask, bool Randomized); | 36 void scan(const SmallBitVector &RegMask, bool Randomized); |
37 // Returns the number of times some variable has been assigned a register but | 37 // Returns the number of times some variable has been assigned a register but |
38 // later evicted because of a higher-priority allocation. The idea is that we | 38 // later evicted because of a higher-priority allocation. The idea is that we |
39 // can implement "second-chance bin-packing" by rerunning register allocation | 39 // can implement "second-chance bin-packing" by rerunning register allocation |
40 // until there are no more evictions. | 40 // until there are no more evictions. |
41 SizeT getNumEvictions() const { return Evicted.size(); } | 41 SizeT getNumEvictions() const { return Evicted.size(); } |
42 bool hasEvictions() const { return !Evicted.empty(); } | 42 bool hasEvictions() const { return !Evicted.empty(); } |
43 void dump(Cfg *Func) const; | 43 void dump(Cfg *Func) const; |
44 | 44 |
45 // TODO(stichnot): Statically choose the size based on the target being | 45 // TODO(stichnot): Statically choose the size based on the target being |
46 // compiled. | 46 // compiled. For now, choose a value large enough to fit into the |
47 static constexpr size_t REGS_SIZE = 32; | 47 // SmallVector's fixed portion, which is 32 for x86-32, 84 for x86-64, and 102 |
48 // for ARM32. | |
49 static constexpr size_t REGS_SIZE = 128; | |
48 | 50 |
49 private: | 51 private: |
50 using OrderedRanges = CfgVector<Variable *>; | 52 using OrderedRanges = CfgVector<Variable *>; |
51 using UnorderedRanges = CfgVector<Variable *>; | 53 using UnorderedRanges = CfgVector<Variable *>; |
52 using DefUseErrorList = llvm::SmallVector<SizeT, 10>; | 54 using DefUseErrorList = llvm::SmallVector<SizeT, 10>; |
53 | 55 |
54 class IterationState { | 56 class IterationState { |
55 IterationState(const IterationState &) = delete; | 57 IterationState(const IterationState &) = delete; |
56 IterationState operator=(const IterationState &) = delete; | 58 IterationState operator=(const IterationState &) = delete; |
57 | 59 |
58 public: | 60 public: |
59 IterationState() = default; | 61 IterationState() = default; |
60 Variable *Cur = nullptr; | 62 Variable *Cur = nullptr; |
61 Variable *Prefer = nullptr; | 63 Variable *Prefer = nullptr; |
62 RegNumT PreferReg; | 64 RegNumT PreferReg; |
63 bool AllowOverlap = false; | 65 bool AllowOverlap = false; |
64 SmallBitVector RegMask; | 66 SmallBitVector RegMask; |
65 SmallBitVector RegMaskUnfiltered; | 67 SmallBitVector RegMaskUnfiltered; |
66 SmallBitVector Free; | 68 SmallBitVector Free; |
67 SmallBitVector FreeUnfiltered; | 69 SmallBitVector FreeUnfiltered; |
68 SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping | 70 SmallBitVector PrecoloredUnhandledMask; // Note: only used for dumping |
69 llvm::SmallVector<RegWeight, REGS_SIZE> Weights; | 71 llvm::SmallVector<RegWeight, REGS_SIZE> Weights; |
John
2016/03/09 23:15:41
Perhaps change this to std::array?
Jim Stichnoth
2016/03/09 23:19:31
I did try making that change, and also to the two
| |
70 }; | 72 }; |
71 | 73 |
72 bool livenessValidateIntervals(const DefUseErrorList &DefsWithoutUses, | 74 bool livenessValidateIntervals(const DefUseErrorList &DefsWithoutUses, |
73 const DefUseErrorList &UsesBeforeDefs, | 75 const DefUseErrorList &UsesBeforeDefs, |
74 const CfgVector<InstNumberT> &LRBegin, | 76 const CfgVector<InstNumberT> &LRBegin, |
75 const CfgVector<InstNumberT> &LREnd) const; | 77 const CfgVector<InstNumberT> &LREnd) const; |
76 void initForGlobal(); | 78 void initForGlobal(); |
77 void initForInfOnly(); | 79 void initForInfOnly(); |
78 void initForSecondChance(); | 80 void initForSecondChance(); |
79 /// Move an item from the From set to the To set. From[Index] is pushed onto | 81 /// Move an item from the From set to the To set. From[Index] is pushed onto |
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130 bool FindPreference = false; | 132 bool FindPreference = false; |
131 bool FindOverlap = false; | 133 bool FindOverlap = false; |
132 | 134 |
133 const bool Verbose; | 135 const bool Verbose; |
134 const bool UseReserve; | 136 const bool UseReserve; |
135 }; | 137 }; |
136 | 138 |
137 } // end of namespace Ice | 139 } // end of namespace Ice |
138 | 140 |
139 #endif // SUBZERO_SRC_ICEREGALLOC_H | 141 #endif // SUBZERO_SRC_ICEREGALLOC_H |
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