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Issue 1775323002: [turbofan] Frame elision for code stubs (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/pipeline.h" 5 #include "src/compiler/pipeline.h"
6 6
7 #include <fstream> // NOLINT(readability/streams) 7 #include <fstream> // NOLINT(readability/streams)
8 #include <sstream> 8 #include <sstream>
9 9
10 #include "src/base/adapters.h" 10 #include "src/base/adapters.h"
(...skipping 1358 matching lines...) Expand 10 before | Expand all | Expand 10 after
1369 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN), 1369 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN),
1370 call_descriptor, run_verifier); 1370 call_descriptor, run_verifier);
1371 if (data->compilation_failed()) { 1371 if (data->compilation_failed()) {
1372 info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc); 1372 info()->AbortOptimization(kNotEnoughVirtualRegistersRegalloc);
1373 return Handle<Code>(); 1373 return Handle<Code>();
1374 } 1374 }
1375 1375
1376 BeginPhaseKind("code generation"); 1376 BeginPhaseKind("code generation");
1377 // TODO(mtrofin): move this off to the register allocator. 1377 // TODO(mtrofin): move this off to the register allocator.
1378 bool generate_frame_at_start = 1378 bool generate_frame_at_start =
1379 !FLAG_turbo_frame_elision || !data_->info()->IsStub() || 1379 data_->sequence()->instruction_blocks().front()->must_construct_frame();
1380 !data_->frame()->needs_frame() ||
1381 data_->sequence()->instruction_blocks().front()->needs_frame() ||
1382 linkage.GetIncomingDescriptor()->CalleeSavedFPRegisters() != 0 ||
1383 linkage.GetIncomingDescriptor()->CalleeSavedRegisters() != 0;
1384 // Optimimize jumps. 1380 // Optimimize jumps.
1385 if (FLAG_turbo_jt) { 1381 if (FLAG_turbo_jt) {
1386 Run<JumpThreadingPhase>(generate_frame_at_start); 1382 Run<JumpThreadingPhase>(generate_frame_at_start);
1387 } 1383 }
1388 1384
1389 // Generate final machine code. 1385 // Generate final machine code.
1390 Run<GenerateCodePhase>(&linkage); 1386 Run<GenerateCodePhase>(&linkage);
1391 1387
1392 Handle<Code> code = data->code(); 1388 Handle<Code> code = data->code();
1393 if (profiler_data != nullptr) { 1389 if (profiler_data != nullptr) {
(...skipping 98 matching lines...) Expand 10 before | Expand all | Expand 10 after
1492 Run<AssignSpillSlotsPhase>(); 1488 Run<AssignSpillSlotsPhase>();
1493 1489
1494 Run<CommitAssignmentPhase>(); 1490 Run<CommitAssignmentPhase>();
1495 Run<PopulateReferenceMapsPhase>(); 1491 Run<PopulateReferenceMapsPhase>();
1496 Run<ConnectRangesPhase>(); 1492 Run<ConnectRangesPhase>();
1497 Run<ResolveControlFlowPhase>(); 1493 Run<ResolveControlFlowPhase>();
1498 if (FLAG_turbo_move_optimization) { 1494 if (FLAG_turbo_move_optimization) {
1499 Run<OptimizeMovesPhase>(); 1495 Run<OptimizeMovesPhase>();
1500 } 1496 }
1501 1497
1498 if (descriptor != nullptr && descriptor->RequiresFrameAsIncoming()) {
1499 data_->sequence()->instruction_blocks()[0]->mark_needs_frame();
1500 }
1501
1502 Run<LocateSpillSlotsPhase>(); 1502 Run<LocateSpillSlotsPhase>();
1503 Run<FrameElisionPhase>(); 1503 Run<FrameElisionPhase>();
1504 1504
1505 if (FLAG_trace_turbo_graph) { 1505 if (FLAG_trace_turbo_graph) {
1506 OFStream os(stdout); 1506 OFStream os(stdout);
1507 PrintableInstructionSequence printable = {config, data->sequence()}; 1507 PrintableInstructionSequence printable = {config, data->sequence()};
1508 os << "----- Instruction sequence after register allocation -----\n" 1508 os << "----- Instruction sequence after register allocation -----\n"
1509 << printable; 1509 << printable;
1510 } 1510 }
1511 1511
1512 if (verifier != nullptr) { 1512 if (verifier != nullptr) {
1513 verifier->VerifyAssignment(); 1513 verifier->VerifyAssignment();
1514 verifier->VerifyGapMoves(); 1514 verifier->VerifyGapMoves();
1515 } 1515 }
1516 1516
1517 if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) { 1517 if (FLAG_trace_turbo && !data->MayHaveUnverifiableGraph()) {
1518 TurboCfgFile tcf(data->isolate()); 1518 TurboCfgFile tcf(data->isolate());
1519 tcf << AsC1VRegisterAllocationData("CodeGen", 1519 tcf << AsC1VRegisterAllocationData("CodeGen",
1520 data->register_allocation_data()); 1520 data->register_allocation_data());
1521 } 1521 }
1522 1522
1523 data->DeleteRegisterAllocationZone(); 1523 data->DeleteRegisterAllocationZone();
1524 } 1524 }
1525 1525
1526 Isolate* Pipeline::isolate() const { return info()->isolate(); } 1526 Isolate* Pipeline::isolate() const { return info()->isolate(); }
1527 1527
1528 } // namespace compiler 1528 } // namespace compiler
1529 } // namespace internal 1529 } // namespace internal
1530 } // namespace v8 1530 } // namespace v8
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