Index: src/IceTargetLoweringX86BaseImpl.h |
diff --git a/src/IceTargetLoweringX86BaseImpl.h b/src/IceTargetLoweringX86BaseImpl.h |
index 7707d148af2d09635a148c9d2cc6656fe68f4ea1..c6ba36c9cbe19e03ade328a0f98c27020e4f985b 100644 |
--- a/src/IceTargetLoweringX86BaseImpl.h |
+++ b/src/IceTargetLoweringX86BaseImpl.h |
@@ -1525,7 +1525,7 @@ bool TargetX86Base<TraitsType>::optimizeScalarMul(Variable *Dest, Operand *Src0, |
return true; |
} |
if (Src1 == 0) { |
- _mov(Dest, Ctx->getConstantZero(Ty)); |
+ _mov(Dest, getConstantZero(Ty)); |
return true; |
} |
if (Src1 == 1) { |
@@ -1582,7 +1582,7 @@ bool TargetX86Base<TraitsType>::optimizeScalarMul(Variable *Dest, Operand *Src0, |
} else { |
_mov(T, Src0); |
} |
- Constant *Zero = Ctx->getConstantZero(IceType_i32); |
+ Constant *Zero = getConstantZero(IceType_i32); |
for (uint32_t i = 0; i < Count9; ++i) { |
constexpr uint16_t Shift = 3; // log2(9-1) |
_lea(T, X86OperandMem::create(Func, IceType_void, T, Zero, T, Shift)); |
@@ -1611,7 +1611,7 @@ void TargetX86Base<TraitsType>::lowerShift64(InstArithmetic::OpKind Op, |
Variable *DestHi) { |
// TODO: Refactor the similarities between Shl, Lshr, and Ashr. |
Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr; |
- Constant *Zero = Ctx->getConstantZero(IceType_i32); |
+ Constant *Zero = getConstantZero(IceType_i32); |
Constant *SignExtend = Ctx->getConstantInt32(0x1f); |
if (auto *ConstantShiftAmount = llvm::dyn_cast<ConstantInteger32>(Src1Lo)) { |
uint32_t ShiftAmount = ConstantShiftAmount->getValue(); |
@@ -2201,7 +2201,7 @@ void TargetX86Base<TraitsType>::lowerArithmetic(const InstArithmetic *Instr) { |
} |
T_edx = makeReg(Ty, Edx); |
_mov(T, Src0, Eax); |
- _mov(T_edx, Ctx->getConstantZero(Ty)); |
+ _mov(T_edx, getConstantZero(Ty)); |
_div(T, Src1, T_edx); |
_mov(Dest, T); |
} break; |
@@ -2290,7 +2290,7 @@ void TargetX86Base<TraitsType>::lowerArithmetic(const InstArithmetic *Instr) { |
break; |
} |
T_edx = makeReg(Ty, Edx); |
- _mov(T_edx, Ctx->getConstantZero(Ty)); |
+ _mov(T_edx, getConstantZero(Ty)); |
_mov(T, Src0, Eax); |
_div(T_edx, Src1, T); |
_mov(Dest, T_edx); |
@@ -2318,7 +2318,7 @@ void TargetX86Base<TraitsType>::lowerArithmetic(const InstArithmetic *Instr) { |
uint32_t TypeWidth = Traits::X86_CHAR_BIT * typeWidthInBytes(Ty); |
// If for some reason we are dividing by 1, just assign 0. |
if (LogDiv == 0) { |
- _mov(Dest, Ctx->getConstantZero(Ty)); |
+ _mov(Dest, getConstantZero(Ty)); |
return; |
} |
_mov(T, Src0); |
@@ -2432,7 +2432,7 @@ void TargetX86Base<TraitsType>::lowerBr(const InstBr *Br) { |
} |
} |
Operand *Src0 = legalize(Cond, Legal_Reg | Legal_Mem); |
- Constant *Zero = Ctx->getConstantZero(IceType_i32); |
+ Constant *Zero = getConstantZero(IceType_i32); |
_cmp(Src0, Zero); |
_br(Traits::Cond::Br_ne, Br->getTargetTrue(), Br->getTargetFalse()); |
} |
@@ -2731,7 +2731,7 @@ void TargetX86Base<TraitsType>::lowerCast(const InstCast *Instr) { |
_movp(Dest, T); |
} else if (!Traits::Is64Bit && DestTy == IceType_i64) { |
// t1=movzx src; dst.lo=t1; dst.hi=0 |
- Constant *Zero = Ctx->getConstantZero(IceType_i32); |
+ Constant *Zero = getConstantZero(IceType_i32); |
auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); |
auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
Variable *Tmp = makeReg(DestLo->getType()); |
@@ -3913,7 +3913,7 @@ void TargetX86Base<TraitsType>::lowerIntrinsicCall( |
// make 16-byte operations lock free (when used with the LOCK prefix). |
// However, that's not supported in 32-bit mode, so just return 0 even |
// for large sizes. |
- Result = Ctx->getConstantZero(IceType_i32); |
+ Result = getConstantZero(IceType_i32); |
break; |
case 1: |
case 2: |
@@ -4072,7 +4072,7 @@ void TargetX86Base<TraitsType>::lowerIntrinsicCall( |
assert(T == Dest); |
if (Val->getType() == IceType_i64) { |
auto *DestHi = llvm::cast<Variable>(hiOperand(Dest)); |
- Constant *Zero = Ctx->getConstantZero(IceType_i32); |
+ Constant *Zero = getConstantZero(IceType_i32); |
_mov(DestHi, Zero); |
} |
} else { |
@@ -4663,7 +4663,7 @@ void TargetX86Base<TraitsType>::lowerCountZeros(bool Cttz, Type Ty, |
_test(SecondVar, SecondVar); |
_cmov(T_Dest2, T_Dest, Traits::Cond::Br_e); |
_mov(DestLo, T_Dest2); |
- _mov(DestHi, Ctx->getConstantZero(IceType_i32)); |
+ _mov(DestHi, getConstantZero(IceType_i32)); |
} |
template <typename TraitsType> |
@@ -5469,7 +5469,7 @@ void TargetX86Base<TraitsType>::doMockBoundsCheck(Operand *Opnd) { |
return; |
auto *Label = InstX86Label::create(Func, this); |
- _cmp(Opnd, Ctx->getConstantZero(IceType_i32)); |
+ _cmp(Opnd, getConstantZero(IceType_i32)); |
_br(Traits::Cond::Br_e, Label); |
_cmp(Opnd, Ctx->getConstantInt32(1)); |
_br(Traits::Cond::Br_e, Label); |
@@ -5563,7 +5563,7 @@ void TargetX86Base<TraitsType>::lowerSelect(const InstSelect *Select) { |
} |
Operand *CmpResult = legalize(Condition, Legal_Reg | Legal_Mem); |
- Operand *Zero = Ctx->getConstantZero(IceType_i32); |
+ Operand *Zero = getConstantZero(IceType_i32); |
_cmp(CmpResult, Zero); |
Operand *SrcT = Select->getTrueOperand(); |
Operand *SrcF = Select->getFalseOperand(); |
@@ -6207,7 +6207,7 @@ template <typename TraitsType> |
void TargetX86Base<TraitsType>::genTargetHelperCallFor(Inst *Instr) { |
uint32_t StackArgumentsSize = 0; |
if (auto *Arith = llvm::dyn_cast<InstArithmetic>(Instr)) { |
- const char *HelperName = nullptr; |
+ RuntimeHelperFuncKind HelperName = H_Num; |
Variable *Dest = Arith->getDest(); |
Type DestTy = Dest->getType(); |
if (!Traits::Is64Bit && DestTy == IceType_i64) { |
@@ -6276,7 +6276,7 @@ void TargetX86Base<TraitsType>::genTargetHelperCallFor(Inst *Instr) { |
const Type SrcType = Src0->getType(); |
Variable *Dest = Cast->getDest(); |
const Type DestTy = Dest->getType(); |
- const char *HelperName = nullptr; |
+ RuntimeHelperFuncKind HelperName = H_Num; |
Variable *CallDest = Dest; |
switch (CastKind) { |
default: |
@@ -6501,7 +6501,7 @@ Variable *TargetX86Base<TraitsType>::makeZeroedRegister(Type Ty, |
case IceType_i32: |
case IceType_i64: |
// Conservatively do "mov reg, 0" to avoid modifying FLAGS. |
- _mov(Reg, Ctx->getConstantZero(Ty)); |
+ _mov(Reg, getConstantZero(Ty)); |
break; |
case IceType_f32: |
case IceType_f64: |
@@ -6573,7 +6573,7 @@ Variable *TargetX86Base<TraitsType>::makeVectorOfHighOrderBits(Type Ty, |
Constant *ConstantMask = Ctx->getConstantInt32(HIGH_ORDER_BITS_MASK); |
Variable *Reg = makeReg(Ty, RegNum); |
_movd(Reg, legalize(ConstantMask, Legal_Reg | Legal_Mem)); |
- _pshufd(Reg, Reg, Ctx->getConstantZero(IceType_i8)); |
+ _pshufd(Reg, Reg, getConstantZero(IceType_i8)); |
return Reg; |
} |
} |
@@ -6885,7 +6885,7 @@ Operand *TargetX86Base<TraitsType>::legalizeUndef(Operand *From, |
// in uninitialized registers. |
if (isVectorType(Ty)) |
return makeVectorOfZeros(Ty, RegNum); |
- return Ctx->getConstantZero(Ty); |
+ return getConstantZero(Ty); |
} |
return From; |
} |