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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_S390 | 9 #if V8_TARGET_ARCH_S390 |
10 | 10 |
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2968 | 2968 |
2969 void Simulator::DecodeFourByteFloatingPointIntConversion(Instruction* instr) { | 2969 void Simulator::DecodeFourByteFloatingPointIntConversion(Instruction* instr) { |
2970 Opcode op = instr->S390OpcodeValue(); | 2970 Opcode op = instr->S390OpcodeValue(); |
2971 switch (op) { | 2971 switch (op) { |
2972 case CDLFBR: | 2972 case CDLFBR: |
2973 case CDLGBR: | 2973 case CDLGBR: |
2974 case CELGBR: | 2974 case CELGBR: |
2975 case CLFDBR: | 2975 case CLFDBR: |
2976 case CLGDBR: | 2976 case CLGDBR: |
2977 case CELFBR: | 2977 case CELFBR: |
2978 case CLGEBR: { | 2978 case CLGEBR: |
| 2979 case CLFEBR: { |
2979 RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr); | 2980 RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr); |
2980 int r1 = rreInstr->R1Value(); | 2981 int r1 = rreInstr->R1Value(); |
2981 int r2 = rreInstr->R2Value(); | 2982 int r2 = rreInstr->R2Value(); |
2982 if (op == CDLFBR) { | 2983 if (op == CDLFBR) { |
2983 uint32_t r2_val = get_low_register<uint32_t>(r2); | 2984 uint32_t r2_val = get_low_register<uint32_t>(r2); |
2984 double r1_val = static_cast<double>(r2_val); | 2985 double r1_val = static_cast<double>(r2_val); |
2985 set_d_register_from_double(r1, r1_val); | 2986 set_d_register_from_double(r1, r1_val); |
2986 } else if (op == CELFBR) { | 2987 } else if (op == CELFBR) { |
2987 uint32_t r2_val = get_low_register<uint32_t>(r2); | 2988 uint32_t r2_val = get_low_register<uint32_t>(r2); |
2988 float r1_val = static_cast<float>(r2_val); | 2989 float r1_val = static_cast<float>(r2_val); |
2989 set_d_register_from_float32(r1, r1_val); | 2990 set_d_register_from_float32(r1, r1_val); |
2990 } else if (op == CDLGBR) { | 2991 } else if (op == CDLGBR) { |
2991 uint64_t r2_val = get_register(r2); | 2992 uint64_t r2_val = get_register(r2); |
2992 double r1_val = static_cast<double>(r2_val); | 2993 double r1_val = static_cast<double>(r2_val); |
2993 set_d_register_from_double(r1, r1_val); | 2994 set_d_register_from_double(r1, r1_val); |
2994 } else if (op == CELGBR) { | 2995 } else if (op == CELGBR) { |
2995 uint64_t r2_val = get_register(r2); | 2996 uint64_t r2_val = get_register(r2); |
2996 float r1_val = static_cast<float>(r2_val); | 2997 float r1_val = static_cast<float>(r2_val); |
2997 set_d_register_from_float32(r1, r1_val); | 2998 set_d_register_from_float32(r1, r1_val); |
2998 } else if (op == CLFDBR) { | 2999 } else if (op == CLFDBR) { |
2999 double r2_val = get_double_from_d_register(r2); | 3000 double r2_val = get_double_from_d_register(r2); |
3000 uint32_t r1_val = static_cast<uint32_t>(r2_val); | 3001 uint32_t r1_val = static_cast<uint32_t>(r2_val); |
3001 set_low_register(r1, r1_val); | 3002 set_low_register(r1, r1_val); |
3002 SetS390ConditionCode<double>(r2_val, 0); | 3003 SetS390ConvertConditionCode<double>(r2_val, r1_val, UINT32_MAX); |
| 3004 } else if (op == CLFEBR) { |
| 3005 float r2_val = get_float32_from_d_register(r2); |
| 3006 uint32_t r1_val = static_cast<uint32_t>(r2_val); |
| 3007 set_low_register(r1, r1_val); |
| 3008 SetS390ConvertConditionCode<double>(r2_val, r1_val, UINT32_MAX); |
3003 } else if (op == CLGDBR) { | 3009 } else if (op == CLGDBR) { |
3004 double r2_val = get_double_from_d_register(r2); | 3010 double r2_val = get_double_from_d_register(r2); |
3005 uint64_t r1_val = static_cast<uint64_t>(r2_val); | 3011 uint64_t r1_val = static_cast<uint64_t>(r2_val); |
3006 set_register(r1, r1_val); | 3012 set_register(r1, r1_val); |
3007 SetS390ConditionCode<double>(r2_val, 0); | 3013 SetS390ConvertConditionCode<double>(r2_val, r1_val, UINT64_MAX); |
3008 } else if (op == CLGEBR) { | 3014 } else if (op == CLGEBR) { |
3009 float r2_val = get_float32_from_d_register(r2); | 3015 float r2_val = get_float32_from_d_register(r2); |
3010 uint64_t r1_val = static_cast<uint64_t>(r2_val); | 3016 uint64_t r1_val = static_cast<uint64_t>(r2_val); |
3011 set_register(r1, r1_val); | 3017 set_register(r1, r1_val); |
3012 SetS390ConditionCode<double>(r2_val, 0); | 3018 SetS390ConvertConditionCode<double>(r2_val, r1_val, UINT64_MAX); |
3013 } | 3019 } |
3014 break; | 3020 break; |
3015 } | 3021 } |
3016 default: | 3022 default: |
3017 UNREACHABLE(); | 3023 UNREACHABLE(); |
3018 } | 3024 } |
3019 } | 3025 } |
3020 | 3026 |
3021 void Simulator::DecodeFourByteFloatingPointRound(Instruction* instr) { | 3027 void Simulator::DecodeFourByteFloatingPointRound(Instruction* instr) { |
3022 Opcode op = instr->S390OpcodeValue(); | 3028 Opcode op = instr->S390OpcodeValue(); |
3023 RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr); | 3029 RREInstruction* rreInstr = reinterpret_cast<RREInstruction*>(instr); |
3024 int r1 = rreInstr->R1Value(); | 3030 int r1 = rreInstr->R1Value(); |
3025 int r2 = rreInstr->R2Value(); | 3031 int r2 = rreInstr->R2Value(); |
3026 double r2_val = get_double_from_d_register(r2); | 3032 double r2_val = get_double_from_d_register(r2); |
3027 float r2_fval = get_float32_from_d_register(r2); | 3033 float r2_fval = get_float32_from_d_register(r2); |
3028 | 3034 |
3029 switch (op) { | 3035 switch (op) { |
3030 case CFDBR: { | 3036 case CFDBR: { |
3031 int mask_val = rreInstr->M3Value(); | 3037 int mask_val = rreInstr->M3Value(); |
3032 int32_t r1_val = 0; | 3038 int32_t r1_val = 0; |
3033 | 3039 |
3034 if (r2_val == 0.0) | 3040 SetS390RoundConditionCode(r2_val, INT32_MAX, INT32_MIN); |
3035 condition_reg_ = 8; | |
3036 else if (r2_val < 0.0) | |
3037 condition_reg_ = 4; | |
3038 else if (r2_val > 0.0) | |
3039 condition_reg_ = 2; | |
3040 else | |
3041 condition_reg_ = 1; | |
3042 | 3041 |
3043 switch (mask_val) { | 3042 switch (mask_val) { |
3044 case CURRENT_ROUNDING_MODE: | 3043 case CURRENT_ROUNDING_MODE: |
3045 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { | 3044 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { |
3046 r1_val = static_cast<int32_t>(r2_val); | 3045 r1_val = static_cast<int32_t>(r2_val); |
3047 break; | 3046 break; |
3048 } | 3047 } |
3049 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: { | 3048 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: { |
3050 double ceil_val = std::ceil(r2_val); | 3049 double ceil_val = std::ceil(r2_val); |
3051 double floor_val = std::floor(r2_val); | 3050 double floor_val = std::floor(r2_val); |
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3112 default: | 3111 default: |
3113 UNREACHABLE(); | 3112 UNREACHABLE(); |
3114 } | 3113 } |
3115 set_low_register(r1, r1_val); | 3114 set_low_register(r1, r1_val); |
3116 break; | 3115 break; |
3117 } | 3116 } |
3118 case CGDBR: { | 3117 case CGDBR: { |
3119 int mask_val = rreInstr->M3Value(); | 3118 int mask_val = rreInstr->M3Value(); |
3120 int64_t r1_val = 0; | 3119 int64_t r1_val = 0; |
3121 | 3120 |
3122 if (r2_val == 0.0) | 3121 SetS390RoundConditionCode(r2_val, INT64_MAX, INT64_MIN); |
3123 condition_reg_ = 8; | |
3124 else if (r2_val < 0.0) | |
3125 condition_reg_ = 4; | |
3126 else if (r2_val > 0.0) | |
3127 condition_reg_ = 2; | |
3128 else | |
3129 condition_reg_ = 1; | |
3130 | 3122 |
3131 switch (mask_val) { | 3123 switch (mask_val) { |
3132 case CURRENT_ROUNDING_MODE: | 3124 case CURRENT_ROUNDING_MODE: |
3133 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: | 3125 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: |
3134 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { | 3126 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { |
3135 UNIMPLEMENTED(); | 3127 UNIMPLEMENTED(); |
3136 break; | 3128 break; |
3137 } | 3129 } |
3138 case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: { | 3130 case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: { |
3139 double ceil_val = std::ceil(r2_val); | 3131 double ceil_val = std::ceil(r2_val); |
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3168 default: | 3160 default: |
3169 UNREACHABLE(); | 3161 UNREACHABLE(); |
3170 } | 3162 } |
3171 set_register(r1, r1_val); | 3163 set_register(r1, r1_val); |
3172 break; | 3164 break; |
3173 } | 3165 } |
3174 case CGEBR: { | 3166 case CGEBR: { |
3175 int mask_val = rreInstr->M3Value(); | 3167 int mask_val = rreInstr->M3Value(); |
3176 int64_t r1_val = 0; | 3168 int64_t r1_val = 0; |
3177 | 3169 |
3178 if (r2_fval == 0.0) | 3170 SetS390RoundConditionCode(r2_fval, INT64_MAX, INT64_MIN); |
3179 condition_reg_ = 8; | |
3180 else if (r2_fval < 0.0) | |
3181 condition_reg_ = 4; | |
3182 else if (r2_fval > 0.0) | |
3183 condition_reg_ = 2; | |
3184 else | |
3185 condition_reg_ = 1; | |
3186 | 3171 |
3187 switch (mask_val) { | 3172 switch (mask_val) { |
3188 case CURRENT_ROUNDING_MODE: | 3173 case CURRENT_ROUNDING_MODE: |
3189 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: | 3174 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: |
3190 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { | 3175 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { |
3191 UNIMPLEMENTED(); | 3176 UNIMPLEMENTED(); |
3192 break; | 3177 break; |
3193 } | 3178 } |
3194 case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: { | 3179 case ROUND_TO_NEAREST_WITH_TIES_TO_EVEN: { |
3195 float ceil_val = std::ceil(r2_fval); | 3180 float ceil_val = std::ceil(r2_fval); |
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3224 default: | 3209 default: |
3225 UNREACHABLE(); | 3210 UNREACHABLE(); |
3226 } | 3211 } |
3227 set_register(r1, r1_val); | 3212 set_register(r1, r1_val); |
3228 break; | 3213 break; |
3229 } | 3214 } |
3230 case CFEBR: { | 3215 case CFEBR: { |
3231 int mask_val = rreInstr->M3Value(); | 3216 int mask_val = rreInstr->M3Value(); |
3232 int32_t r1_val = 0; | 3217 int32_t r1_val = 0; |
3233 | 3218 |
3234 if (r2_fval == 0.0) | 3219 SetS390RoundConditionCode(r2_fval, INT32_MAX, INT32_MIN); |
3235 condition_reg_ = 8; | |
3236 else if (r2_fval < 0.0) | |
3237 condition_reg_ = 4; | |
3238 else if (r2_fval > 0.0) | |
3239 condition_reg_ = 2; | |
3240 else | |
3241 condition_reg_ = 1; | |
3242 | 3220 |
3243 switch (mask_val) { | 3221 switch (mask_val) { |
3244 case CURRENT_ROUNDING_MODE: | 3222 case CURRENT_ROUNDING_MODE: |
3245 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { | 3223 case ROUND_TO_PREPARE_FOR_SHORTER_PRECISION: { |
3246 r1_val = static_cast<int32_t>(r2_fval); | 3224 r1_val = static_cast<int32_t>(r2_fval); |
3247 break; | 3225 break; |
3248 } | 3226 } |
3249 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: { | 3227 case ROUND_TO_NEAREST_WITH_TIES_AWAY_FROM_0: { |
3250 float ceil_val = std::ceil(r2_fval); | 3228 float ceil_val = std::ceil(r2_fval); |
3251 float floor_val = std::floor(r2_fval); | 3229 float floor_val = std::floor(r2_fval); |
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3480 UNREACHABLE(); | 3458 UNREACHABLE(); |
3481 } | 3459 } |
3482 break; | 3460 break; |
3483 } | 3461 } |
3484 case CDLFBR: | 3462 case CDLFBR: |
3485 case CDLGBR: | 3463 case CDLGBR: |
3486 case CELGBR: | 3464 case CELGBR: |
3487 case CLFDBR: | 3465 case CLFDBR: |
3488 case CELFBR: | 3466 case CELFBR: |
3489 case CLGDBR: | 3467 case CLGDBR: |
3490 case CLGEBR: { | 3468 case CLGEBR: |
| 3469 case CLFEBR: { |
3491 DecodeFourByteFloatingPointIntConversion(instr); | 3470 DecodeFourByteFloatingPointIntConversion(instr); |
3492 break; | 3471 break; |
3493 } | 3472 } |
3494 case TMLL: { | 3473 case TMLL: { |
3495 RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr); | 3474 RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr); |
3496 int r1 = riinst->R1Value(); | 3475 int r1 = riinst->R1Value(); |
3497 int mask = riinst->I2Value() & 0x0000FFFF; | 3476 int mask = riinst->I2Value() & 0x0000FFFF; |
3498 if (mask == 0) { | 3477 if (mask == 0) { |
3499 condition_reg_ = 0x0; | 3478 condition_reg_ = 0x0; |
3500 break; | 3479 break; |
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5003 uintptr_t address = *stack_slot; | 4982 uintptr_t address = *stack_slot; |
5004 set_register(sp, current_sp + sizeof(uintptr_t)); | 4983 set_register(sp, current_sp + sizeof(uintptr_t)); |
5005 return address; | 4984 return address; |
5006 } | 4985 } |
5007 | 4986 |
5008 } // namespace internal | 4987 } // namespace internal |
5009 } // namespace v8 | 4988 } // namespace v8 |
5010 | 4989 |
5011 #endif // USE_SIMULATOR | 4990 #endif // USE_SIMULATOR |
5012 #endif // V8_TARGET_ARCH_S390 | 4991 #endif // V8_TARGET_ARCH_S390 |
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