Subzero: Control memory growth from local label fixups.

src/IceAssemblerARM32.cpp

 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 575 matching lines @@
 namespace ARM32 {
 
 size_t MoveRelocatableFixup::emit(GlobalContext *Ctx,
                                   const Assembler &Asm) const {
   if (!BuildDefs::dump())
     return InstARM32::InstSize;
   Ostream &Str = Ctx->getStrEmit();
   IValueT Inst = Asm.load<IValueT>(position());
   const bool IsMovw = kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ||
                       kind() == llvm::ELF::R_ARM_MOVW_PREL_NC;
+  const IceString Symbol = symbol();
+  const bool NeedsPCRelSuffix =
+      (Asm.fixupIsPCRel(kind()) || Symbol == GlobalOffsetTable);
   Str << "\t"
          "mov" << (IsMovw ? "w" : "t") << "\t"
       << RegARM32::getRegName(RegNumT::fixme((Inst >> kRdShift) & 0xF))
-      << ", #:" << (IsMovw ? "lower" : "upper") << "16:" << symbol(&Asm)
-      << "\t@ .word " << llvm::format_hex_no_prefix(Inst, 8) << "\n";
+      << ", #:" << (IsMovw ? "lower" : "upper") << "16:" << Symbol
+      << (NeedsPCRelSuffix ? " - ." : "") << "\t@ .word "
+      // TODO(jpp): This is broken, it also needs to add a magic constant.
+      << llvm::format_hex_no_prefix(Inst, 8) << "\n";
   return InstARM32::InstSize;
 }
 
 IValueT AssemblerARM32::encodeElmtType(Type ElmtTy) {
   switch (ElmtTy) {
   case IceType_i8:
     return 0;
   case IceType_i16:
     return 1;
   case IceType_i32:
@@ skipping 32 matching lines @@
   return F;
 }
 
 size_t BlRelocatableFixup::emit(GlobalContext *Ctx,
                                 const Assembler &Asm) const {
   if (!BuildDefs::dump())
     return InstARM32::InstSize;
   Ostream &Str = Ctx->getStrEmit();
   IValueT Inst = Asm.load<IValueT>(position());
   Str << "\t"
-         "bl\t" << symbol(&Asm) << "\t@ .word "
+         "bl\t" << symbol() << "\t@ .word "
       << llvm::format_hex_no_prefix(Inst, 8) << "\n";
   return InstARM32::InstSize;
 }
 
 void BlRelocatableFixup::emitOffset(Assembler *Asm) const {
   // cccc101liiiiiiiiiiiiiiiiiiiiiiii where cccc=Cond, l=Link, and
   // iiiiiiiiiiiiiiiiiiiiiiii=
   // EncodedBranchOffset(cccc101l000000000000000000000000, Offset);
   const IValueT Inst = Asm->load<IValueT>(position());
   constexpr IValueT OffsetMask = 0x00FFFFFF;
@@ skipping 2532 matching lines @@
   constexpr const char *Vsqrts = "vsqrts";
   IValueT Sd = encodeSRegister(OpSd, "Sd", Vsqrts);
   IValueT Sm = encodeSRegister(OpSm, "Sm", Vsqrts);
   constexpr IValueT VsqrtsOpcode = B23 | B21 | B20 | B16 | B7 | B6;
   constexpr IValueT S0 = 0;
   emitVFPsss(Cond, VsqrtsOpcode, Sd, S0, Sm);
 }
 
 } // end of namespace ARM32
 } // end of namespace Ice