Subzero. ARM32. Fix bugs uncovered by scons tests.

src/IceTargetLoweringARM32.h

 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 767 matching lines @@
   void _sdiv(Variable *Dest, Variable *Src0, Variable *Src1,
              CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert<InstARM32Sdiv>(Dest, Src0, Src1, Pred);
   }
   /// _str, for all your Variable to memory transfers. Addr has the same
   /// restrictions that it does in _ldr.
   void _str(Variable *Value, OperandARM32Mem *Addr,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert<InstARM32Str>(Value, Addr, Pred);
   }
-  void _strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr,
-              CondARM32::Cond Pred = CondARM32::AL) {
-    // strex requires Dest to be a register other than Value or Addr. This
-    // restriction is cleanly represented by adding an "early" definition of
-    // Dest (or a latter use of all the sources.)
-    Context.insert<InstFakeDef>(Dest);
+  InstARM32Strex *_strex(Variable *Dest, Variable *Value, OperandARM32Mem *Addr,
+                         CondARM32::Cond Pred = CondARM32::AL) {
     if (auto *Value64 = llvm::dyn_cast<Variable64On32>(Value)) {
       Context.insert<InstFakeUse>(Value64->getLo());
       Context.insert<InstFakeUse>(Value64->getHi());
     }
-    auto *Instr = Context.insert<InstARM32Strex>(Dest, Value, Addr, Pred);
-    Instr->setDestRedefined();
+    return Context.insert<InstARM32Strex>(Dest, Value, Addr, Pred);
   }
   void _sub(Variable *Dest, Variable *Src0, Operand *Src1,
             CondARM32::Cond Pred = CondARM32::AL) {
     Context.insert<InstARM32Sub>(Dest, Src0, Src1, Pred);
   }
   void _subs(Variable *Dest, Variable *Src0, Operand *Src1,
              CondARM32::Cond Pred = CondARM32::AL) {
     constexpr bool SetFlags = true;
     Context.insert<InstARM32Sub>(Dest, Src0, Src1, Pred, SetFlags);
     if (SetFlags) {
@@ skipping 520 matching lines @@
 private:
   ~TargetHeaderARM32() = default;
 
   TargetARM32Features CPUFeatures;
 };
 
 } // end of namespace ARM32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H