[wasm] Int64Lowering of I64ShrU and I64ShrS on ia32.

src/compiler/ia32/code-generator-ia32.cc

Index: src/compiler/ia32/code-generator-ia32.cc
diff --git a/src/compiler/ia32/code-generator-ia32.cc b/src/compiler/ia32/code-generator-ia32.cc
index 482376d6aa15851c9e2b32ce6f6706e513475324..cce57b484bccba2f23e950825c152d58fff2e2d4 100644
--- a/src/compiler/ia32/code-generator-ia32.cc
+++ b/src/compiler/ia32/code-generator-ia32.cc
@@ -688,6 +688,22 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
         __ PairShl_cl(i.InputRegister(1), i.InputRegister(0));
       }
       break;
+    case kIA32PairShr:
+      if (HasImmediateInput(instr, 2)) {
+        __ PairShr(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
+      } else {
+        // Shift has been loaded into CL by the register allocator.
+        __ PairShr_cl(i.InputRegister(1), i.InputRegister(0));
+      }
+      break;
+    case kIA32PairSar:
+      if (HasImmediateInput(instr, 2)) {
+        __ PairSar(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
+      } else {
+        // Shift has been loaded into CL by the register allocator.
+        __ PairSar_cl(i.InputRegister(1), i.InputRegister(0));
+      }
+      break;
     case kIA32Ror:
       if (HasImmediateInput(instr, 1)) {
         __ ror(i.OutputOperand(), i.InputInt5(1));