Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(95)

Side by Side Diff: runtime/vm/assembler_mips_test.cc

Issue 1767133002: Fix typo in newly introduced mips assembly tests. (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 4 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
(...skipping 2000 matching lines...) Expand 10 before | Expand all | Expand 10 after
2011 __ LoadImmediate(T0, 0x7FF80000); 2011 __ LoadImmediate(T0, 0x7FF80000);
2012 __ mtc1(ZR, F2); // Load upper bits of NaN. 2012 __ mtc1(ZR, F2); // Load upper bits of NaN.
2013 __ mtc1(T0, F3); // Load lower bits of NaN. 2013 __ mtc1(T0, F3); // Load lower bits of NaN.
2014 __ truncwd(F0, D1); 2014 __ truncwd(F0, D1);
2015 __ mfc1(V0, F0); 2015 __ mfc1(V0, F0);
2016 __ Ret(); 2016 __ Ret();
2017 } 2017 }
2018 2018
2019 2019
2020 ASSEMBLER_TEST_RUN(Cop1TruncWD_NaN, test) { 2020 ASSEMBLER_TEST_RUN(Cop1TruncWD_NaN, test) {
2021 typedef double (*SimpleCode)() DART_UNUSED; 2021 typedef int (*SimpleCode)() DART_UNUSED;
2022 EXPECT(test != NULL); 2022 EXPECT(test != NULL);
2023 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 2023 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2024 } 2024 }
2025 2025
2026 2026
2027 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Inf, assembler) { 2027 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Inf, assembler) {
2028 __ LoadImmediate(T0, 0x7FF00000); // +inf 2028 __ LoadImmediate(T0, 0x7FF00000); // +inf
2029 __ mtc1(ZR, F2); 2029 __ mtc1(ZR, F2);
2030 __ mtc1(T0, F3); 2030 __ mtc1(T0, F3);
2031 __ truncwd(F0, D1); 2031 __ truncwd(F0, D1);
2032 __ mfc1(V0, F0); 2032 __ mfc1(V0, F0);
2033 __ Ret(); 2033 __ Ret();
2034 } 2034 }
2035 2035
2036 2036
2037 ASSEMBLER_TEST_RUN(Cop1TruncWD_Inf, test) { 2037 ASSEMBLER_TEST_RUN(Cop1TruncWD_Inf, test) {
2038 typedef double (*SimpleCode)() DART_UNUSED; 2038 typedef int (*SimpleCode)() DART_UNUSED;
2039 EXPECT(test != NULL); 2039 EXPECT(test != NULL);
2040 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 2040 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2041 } 2041 }
2042 2042
2043 2043
2044 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Overflow, assembler) { 2044 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Overflow, assembler) {
2045 __ LoadImmediate(D1, 2.0*kMaxInt32); 2045 __ LoadImmediate(D1, 2.0*kMaxInt32);
2046 __ truncwd(F0, D1); 2046 __ truncwd(F0, D1);
2047 __ mfc1(V0, F0); 2047 __ mfc1(V0, F0);
2048 __ Ret(); 2048 __ Ret();
2049 } 2049 }
2050 2050
2051 2051
2052 ASSEMBLER_TEST_RUN(Cop1TruncWD_Overflow, test) { 2052 ASSEMBLER_TEST_RUN(Cop1TruncWD_Overflow, test) {
2053 typedef double (*SimpleCode)() DART_UNUSED; 2053 typedef int (*SimpleCode)() DART_UNUSED;
2054 EXPECT(test != NULL); 2054 EXPECT(test != NULL);
2055 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 2055 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2056 } 2056 }
2057 2057
2058 2058
2059 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Underflow, assembler) { 2059 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Underflow, assembler) {
2060 __ LoadImmediate(D1, 2.0*kMinInt32); 2060 __ LoadImmediate(D1, 2.0*kMinInt32);
2061 __ truncwd(F0, D1); 2061 __ truncwd(F0, D1);
2062 __ mfc1(V0, F0); 2062 __ mfc1(V0, F0);
2063 __ Ret(); 2063 __ Ret();
2064 } 2064 }
2065 2065
2066 2066
2067 ASSEMBLER_TEST_RUN(Cop1TruncWD_Underflow, test) { 2067 ASSEMBLER_TEST_RUN(Cop1TruncWD_Underflow, test) {
2068 typedef double (*SimpleCode)() DART_UNUSED; 2068 typedef int (*SimpleCode)() DART_UNUSED;
2069 EXPECT(test != NULL); 2069 EXPECT(test != NULL);
2070 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 2070 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2071 } 2071 }
2072 2072
2073 2073
2074 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) { 2074 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
2075 __ LoadImmediate(T0, 42); 2075 __ LoadImmediate(T0, 42);
2076 __ mtc1(T0, F2); 2076 __ mtc1(T0, F2);
2077 __ cvtdw(D0, F2); 2077 __ cvtdw(D0, F2);
2078 __ Ret(); 2078 __ Ret();
(...skipping 133 matching lines...) Expand 10 before | Expand all | Expand 10 after
2212 ASSEMBLER_TEST_RUN(Semaphore, test) { 2212 ASSEMBLER_TEST_RUN(Semaphore, test) {
2213 EXPECT(test != NULL); 2213 EXPECT(test != NULL);
2214 typedef int (*Semaphore)() DART_UNUSED; 2214 typedef int (*Semaphore)() DART_UNUSED;
2215 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry())); 2215 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
2216 } 2216 }
2217 2217
2218 2218
2219 } // namespace dart 2219 } // namespace dart
2220 2220
2221 #endif // defined TARGET_ARCH_MIPS 2221 #endif // defined TARGET_ARCH_MIPS
OLDNEW
« no previous file with comments | « no previous file | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698