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Side by Side Diff: runtime/vm/assembler_mips_test.cc

Issue 1765623002: Use TRUNC.W instead of CVT.W on mips to convert from double to int as to not (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: address comments Created 4 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
(...skipping 1958 matching lines...) Expand 10 before | Expand all | Expand 10 after
1969 __ Ret(); 1969 __ Ret();
1970 } 1970 }
1971 1971
1972 1972
1973 ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) { 1973 ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) {
1974 typedef int (*SimpleCode)() DART_UNUSED; 1974 typedef int (*SimpleCode)() DART_UNUSED;
1975 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 1975 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1976 } 1976 }
1977 1977
1978 1978
1979 ASSEMBLER_TEST_GENERATE(Cop1TruncWD, assembler) {
1980 __ LoadImmediate(D1, 42.9);
1981 __ truncwd(F0, D1);
1982 __ mfc1(V0, F0);
1983 __ Ret();
1984 }
1985
1986
1987 ASSEMBLER_TEST_RUN(Cop1TruncWD, test) {
1988 typedef int (*SimpleCode)() DART_UNUSED;
1989 EXPECT(test != NULL);
1990 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1991 }
1992
1993
1994 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_neg, assembler) {
1995 __ LoadImmediate(D1, -42.9);
1996 __ truncwd(F0, D1);
1997 __ mfc1(V0, F0);
1998 __ Ret();
1999 }
2000
2001
2002 ASSEMBLER_TEST_RUN(Cop1TruncWD_neg, test) {
2003 typedef int (*SimpleCode)() DART_UNUSED;
2004 EXPECT(test != NULL);
2005 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2006 }
2007
2008
2009 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_NaN, assembler) {
2010 // Double non-signaling NaN is 0x7FF8000000000000.
2011 __ LoadImmediate(T0, 0x7FF80000);
2012 __ mtc1(ZR, F2); // Load upper bits of NaN.
2013 __ mtc1(T0, F3); // Load lower bits of NaN.
2014 __ truncwd(F0, D1);
2015 __ mfc1(V0, F0);
2016 __ Ret();
2017 }
2018
2019
2020 ASSEMBLER_TEST_RUN(Cop1TruncWD_NaN, test) {
2021 typedef double (*SimpleCode)() DART_UNUSED;
2022 EXPECT(test != NULL);
2023 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2024 }
2025
2026
2027 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Inf, assembler) {
2028 __ LoadImmediate(T0, 0x7FF00000); // +inf
2029 __ mtc1(ZR, F2);
2030 __ mtc1(T0, F3);
2031 __ truncwd(F0, D1);
2032 __ mfc1(V0, F0);
2033 __ Ret();
2034 }
2035
2036
2037 ASSEMBLER_TEST_RUN(Cop1TruncWD_Inf, test) {
2038 typedef double (*SimpleCode)() DART_UNUSED;
2039 EXPECT(test != NULL);
2040 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2041 }
2042
2043
2044 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Overflow, assembler) {
2045 __ LoadImmediate(D1, 2.0*kMaxInt32);
2046 __ truncwd(F0, D1);
2047 __ mfc1(V0, F0);
2048 __ Ret();
2049 }
2050
2051
2052 ASSEMBLER_TEST_RUN(Cop1TruncWD_Overflow, test) {
2053 typedef double (*SimpleCode)() DART_UNUSED;
2054 EXPECT(test != NULL);
2055 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2056 }
2057
2058
2059 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_Underflow, assembler) {
2060 __ LoadImmediate(D1, 2.0*kMinInt32);
2061 __ truncwd(F0, D1);
2062 __ mfc1(V0, F0);
2063 __ Ret();
2064 }
2065
2066
2067 ASSEMBLER_TEST_RUN(Cop1TruncWD_Underflow, test) {
2068 typedef double (*SimpleCode)() DART_UNUSED;
2069 EXPECT(test != NULL);
2070 EXPECT_EQ(kMaxInt32, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2071 }
2072
2073
1979 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) { 2074 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
1980 __ LoadImmediate(T0, 42); 2075 __ LoadImmediate(T0, 42);
1981 __ mtc1(T0, F2); 2076 __ mtc1(T0, F2);
1982 __ cvtdw(D0, F2); 2077 __ cvtdw(D0, F2);
1983 __ Ret(); 2078 __ Ret();
1984 } 2079 }
1985 2080
1986 2081
1987 ASSEMBLER_TEST_RUN(Cop1CvtDW, test) { 2082 ASSEMBLER_TEST_RUN(Cop1CvtDW, test) {
1988 typedef double (*SimpleCode)() DART_UNUSED; 2083 typedef double (*SimpleCode)() DART_UNUSED;
(...skipping 12 matching lines...) Expand all
2001 2096
2002 2097
2003 ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) { 2098 ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) {
2004 typedef double (*SimpleCode)() DART_UNUSED; 2099 typedef double (*SimpleCode)() DART_UNUSED;
2005 EXPECT(test != NULL); 2100 EXPECT(test != NULL);
2006 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()); 2101 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2007 EXPECT_FLOAT_EQ(-42.0, res, 0.001); 2102 EXPECT_FLOAT_EQ(-42.0, res, 0.001);
2008 } 2103 }
2009 2104
2010 2105
2011 ASSEMBLER_TEST_GENERATE(Cop1CvtDL, assembler) {
2012 if (TargetCPUFeatures::mips_version() == MIPS32r2) {
2013 __ LoadImmediate(T0, 0x1);
2014 __ mtc1(ZR, F2);
2015 __ mtc1(T0, F3); // D0 <- 0x100000000 = 4294967296
2016 __ cvtdl(D0, D1);
2017 } else {
2018 __ LoadImmediate(D0, 4294967296.0);
2019 }
2020 __ Ret();
2021 }
2022
2023
2024 ASSEMBLER_TEST_RUN(Cop1CvtDL, test) {
2025 typedef double (*SimpleCode)() DART_UNUSED;
2026 EXPECT(test != NULL);
2027 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2028 EXPECT_FLOAT_EQ(4294967296.0, res, 0.001);
2029 }
2030
2031
2032 ASSEMBLER_TEST_GENERATE(Cop1CvtDL_neg, assembler) {
2033 if (TargetCPUFeatures::mips_version() == MIPS32r2) {
2034 __ LoadImmediate(T0, 0xffffffff);
2035 __ mtc1(T0, F2);
2036 __ mtc1(T0, F3); // D0 <- 0xffffffffffffffff = -1
2037 __ cvtdl(D0, D1);
2038 } else {
2039 __ LoadImmediate(D0, -1.0);
2040 }
2041 __ Ret();
2042 }
2043
2044
2045 ASSEMBLER_TEST_RUN(Cop1CvtDL_neg, test) {
2046 typedef double (*SimpleCode)() DART_UNUSED;
2047 EXPECT(test != NULL);
2048 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2049 EXPECT_FLOAT_EQ(-1.0, res, 0.001);
2050 }
2051
2052
2053 ASSEMBLER_TEST_GENERATE(Cop1CvtWD, assembler) {
2054 __ LoadImmediate(D1, 42.0);
2055 __ cvtwd(F0, D1);
2056 __ mfc1(V0, F0);
2057 __ Ret();
2058 }
2059
2060
2061 ASSEMBLER_TEST_RUN(Cop1CvtWD, test) {
2062 typedef int (*SimpleCode)() DART_UNUSED;
2063 EXPECT(test != NULL);
2064 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2065 }
2066
2067
2068 ASSEMBLER_TEST_GENERATE(Cop1CvtWD_neg, assembler) {
2069 __ LoadImmediate(D1, -42.0);
2070 __ cvtwd(F0, D1);
2071 __ mfc1(V0, F0);
2072 __ Ret();
2073 }
2074
2075
2076 ASSEMBLER_TEST_RUN(Cop1CvtWD_neg, test) {
2077 typedef int (*SimpleCode)() DART_UNUSED;
2078 EXPECT(test != NULL);
2079 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2080 }
2081
2082
2083 ASSEMBLER_TEST_GENERATE(Cop1CvtSD, assembler) { 2106 ASSEMBLER_TEST_GENERATE(Cop1CvtSD, assembler) {
2084 __ LoadImmediate(D2, -42.42); 2107 __ LoadImmediate(D2, -42.42);
2085 __ cvtsd(F2, D2); 2108 __ cvtsd(F2, D2);
2086 __ cvtds(D0, F2); 2109 __ cvtds(D0, F2);
2087 __ Ret(); 2110 __ Ret();
2088 } 2111 }
2089 2112
2090 2113
2091 ASSEMBLER_TEST_RUN(Cop1CvtSD, test) { 2114 ASSEMBLER_TEST_RUN(Cop1CvtSD, test) {
2092 typedef double (*SimpleCode)() DART_UNUSED; 2115 typedef double (*SimpleCode)() DART_UNUSED;
(...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after
2189 ASSEMBLER_TEST_RUN(Semaphore, test) { 2212 ASSEMBLER_TEST_RUN(Semaphore, test) {
2190 EXPECT(test != NULL); 2213 EXPECT(test != NULL);
2191 typedef int (*Semaphore)() DART_UNUSED; 2214 typedef int (*Semaphore)() DART_UNUSED;
2192 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry())); 2215 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
2193 } 2216 }
2194 2217
2195 2218
2196 } // namespace dart 2219 } // namespace dart
2197 2220
2198 #endif // defined TARGET_ARCH_MIPS 2221 #endif // defined TARGET_ARCH_MIPS
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