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Side by Side Diff: runtime/vm/assembler_mips.h

Issue 1765623002: Use TRUNC.W instead of CVT.W on mips to convert from double to int as to not (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_MIPS_H_ 5 #ifndef VM_ASSEMBLER_MIPS_H_
6 #define VM_ASSEMBLER_MIPS_H_ 6 #define VM_ASSEMBLER_MIPS_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_mips.h directly; use assembler.h instead. 9 #error Do not include assembler_mips.h directly; use assembler.h instead.
10 #endif 10 #endif
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578 } 578 }
579 579
580 void clo(Register rd, Register rs) { 580 void clo(Register rd, Register rs) {
581 EmitRType(SPECIAL2, rs, rd, rd, 0, CLO); 581 EmitRType(SPECIAL2, rs, rd, rd, 0, CLO);
582 } 582 }
583 583
584 void clz(Register rd, Register rs) { 584 void clz(Register rd, Register rs) {
585 EmitRType(SPECIAL2, rs, rd, rd, 0, CLZ); 585 EmitRType(SPECIAL2, rs, rd, rd, 0, CLZ);
586 } 586 }
587 587
588 // Convert a double in ds to a 32-bit signed int in fd rounding towards 0.
589 void truncwd(FRegister fd, DRegister ds) {
590 FRegister fs = static_cast<FRegister>(ds * 2);
591 EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_TRUNC_W);
592 }
593
588 // Convert a 32-bit float in fs to a 64-bit double in dd. 594 // Convert a 32-bit float in fs to a 64-bit double in dd.
589 void cvtds(DRegister dd, FRegister fs) { 595 void cvtds(DRegister dd, FRegister fs) {
590 FRegister fd = static_cast<FRegister>(dd * 2); 596 FRegister fd = static_cast<FRegister>(dd * 2);
591 EmitFpuRType(COP1, FMT_S, F0, fs, fd, COP1_CVT_D); 597 EmitFpuRType(COP1, FMT_S, F0, fs, fd, COP1_CVT_D);
592 } 598 }
593 599
594 // Converts a 32-bit signed int in fs to a double in fd. 600 // Converts a 32-bit signed int in fs to a double in fd.
595 void cvtdw(DRegister dd, FRegister fs) { 601 void cvtdw(DRegister dd, FRegister fs) {
596 FRegister fd = static_cast<FRegister>(dd * 2); 602 FRegister fd = static_cast<FRegister>(dd * 2);
597 EmitFpuRType(COP1, FMT_W, F0, fs, fd, COP1_CVT_D); 603 EmitFpuRType(COP1, FMT_W, F0, fs, fd, COP1_CVT_D);
598 } 604 }
599 605
600 // Converts a 64-bit signed int in fs to a double in fd. 606 // Convert a 64-bit double in ds to a 32-bit float in fd.
601 void cvtdl(DRegister dd, DRegister ds) {
602 FRegister fs = static_cast<FRegister>(ds * 2);
603 FRegister fd = static_cast<FRegister>(dd * 2);
604 EmitFpuRType(COP1, FMT_L, F0, fs, fd, COP1_CVT_D);
605 }
606
607 void cvtsd(FRegister fd, DRegister ds) { 607 void cvtsd(FRegister fd, DRegister ds) {
608 FRegister fs = static_cast<FRegister>(ds * 2); 608 FRegister fs = static_cast<FRegister>(ds * 2);
609 EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_CVT_S); 609 EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_CVT_S);
610 } 610 }
611 611
612 void cvtwd(FRegister fd, DRegister ds) {
613 FRegister fs = static_cast<FRegister>(ds * 2);
614 EmitFpuRType(COP1, FMT_D, F0, fs, fd, COP1_CVT_W);
615 }
616
617 void div(Register rs, Register rt) { 612 void div(Register rs, Register rt) {
618 EmitRType(SPECIAL, rs, rt, R0, 0, DIV); 613 EmitRType(SPECIAL, rs, rt, R0, 0, DIV);
619 } 614 }
620 615
621 void divd(DRegister dd, DRegister ds, DRegister dt) { 616 void divd(DRegister dd, DRegister ds, DRegister dt) {
622 FRegister fd = static_cast<FRegister>(dd * 2); 617 FRegister fd = static_cast<FRegister>(dd * 2);
623 FRegister fs = static_cast<FRegister>(ds * 2); 618 FRegister fs = static_cast<FRegister>(ds * 2);
624 FRegister ft = static_cast<FRegister>(dt * 2); 619 FRegister ft = static_cast<FRegister>(dt * 2);
625 EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_DIV); 620 EmitFpuRType(COP1, FMT_D, ft, fs, fd, COP1_DIV);
626 } 621 }
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1766 Register value, 1761 Register value,
1767 Label* no_update); 1762 Label* no_update);
1768 1763
1769 DISALLOW_ALLOCATION(); 1764 DISALLOW_ALLOCATION();
1770 DISALLOW_COPY_AND_ASSIGN(Assembler); 1765 DISALLOW_COPY_AND_ASSIGN(Assembler);
1771 }; 1766 };
1772 1767
1773 } // namespace dart 1768 } // namespace dart
1774 1769
1775 #endif // VM_ASSEMBLER_MIPS_H_ 1770 #endif // VM_ASSEMBLER_MIPS_H_
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