MIPS64: Fix 'Fix 'MIPS: use DAHI/DATH for li macro on mips64r6.''

src/mips64/macro-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <limits.h>  // For LONG_MIN, LONG_MAX.
 
 #if V8_TARGET_ARCH_MIPS64
 
 #include "src/base/division-by-constant.h"
 #include "src/bootstrapper.h"
@@ skipping 1349 matching lines @@
 
 static inline int64_t ShiftAndFixSignExtension(int64_t imm, int bitnum) {
   if ((imm >> (bitnum - 1)) & 0x1) {
     imm = (imm >> bitnum) + 1;
   } else {
     imm = imm >> bitnum;
   }
   return imm;
 }
 
-void MacroAssembler::LiLower32BitHelper(Register rd, Operand j) {
+bool MacroAssembler::LiLower32BitHelper(Register rd, Operand j) {
+  bool higher_bits_sign_extended = false;
   if (is_int16(j.imm64_)) {
     daddiu(rd, zero_reg, (j.imm64_ & kImm16Mask));
   } else if (!(j.imm64_ & kHiMask)) {
     ori(rd, zero_reg, (j.imm64_ & kImm16Mask));
   } else if (!(j.imm64_ & kImm16Mask)) {
     lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
+    if ((j.imm64_ >> (kLuiShift + 15)) & 0x1) {
+      higher_bits_sign_extended = true;
+    }
   } else {
     lui(rd, (j.imm64_ >> kLuiShift) & kImm16Mask);
     ori(rd, rd, (j.imm64_ & kImm16Mask));
+    if ((j.imm64_ >> (kLuiShift + 15)) & 0x1) {
+      higher_bits_sign_extended = true;
+    }
   }
+  return higher_bits_sign_extended;
 }
 
 void MacroAssembler::li(Register rd, Operand j, LiFlags mode) {
   DCHECK(!j.is_reg());
   BlockTrampolinePoolScope block_trampoline_pool(this);
   if (!MustUseReg(j.rmode_) && mode == OPTIMIZE_SIZE) {
     // Normal load of an immediate value which does not need Relocation Info.
     if (is_int32(j.imm64_)) {
       LiLower32BitHelper(rd, j);
     } else {
       if (kArchVariant == kMips64r6) {
         int64_t imm = j.imm64_;
-        LiLower32BitHelper(rd, j);
+        bool higher_bits_sign_extended = LiLower32BitHelper(rd, j);
         imm = ShiftAndFixSignExtension(imm, 32);
-        if (imm & kImm16Mask) {
+        // If LUI writes 1s to higher bits, we need both DAHI/DATI.
+        if ((imm & kImm16Mask) ||
+            (higher_bits_sign_extended && (j.imm64_ > 0))) {
           dahi(rd, imm & kImm16Mask);
         }
-        if (!is_int48(j.imm64_)) {
-          imm = ShiftAndFixSignExtension(imm, 16);
-          if (imm & kImm16Mask) {
-            dati(rd, imm & kImm16Mask);
-          }
+        imm = ShiftAndFixSignExtension(imm, 16);
+        if ((!is_int48(j.imm64_) && (imm & kImm16Mask)) ||
+            (higher_bits_sign_extended && (j.imm64_ > 0))) {
+          dati(rd, imm & kImm16Mask);
         }
       } else {
         if (is_int48(j.imm64_)) {
           if ((j.imm64_ >> 32) & kImm16Mask) {
             lui(rd, (j.imm64_ >> 32) & kImm16Mask);
             if ((j.imm64_ >> 16) & kImm16Mask) {
               ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
             }
           } else {
             ori(rd, zero_reg, (j.imm64_ >> 16) & kImm16Mask);
@@ skipping 5243 matching lines @@
   if (mag.shift > 0) sra(result, result, mag.shift);
   srl(at, dividend, 31);
   Addu(result, result, Operand(at));
 }
 
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_TARGET_ARCH_MIPS64